Home
last modified time | relevance | path

Searched refs:state (Results 1 – 21 of 21) sorted by relevance

/dev/net/pcnet/
A Dpcnet.c102 struct pcnet_state *state = dev->state; in pcnet_read_csr() local
109 struct pcnet_state *state = dev->state; in pcnet_write_csr() local
116 struct pcnet_state *state = dev->state; in pcnet_read_bcr() local
123 struct pcnet_state *state = dev->state; in pcnet_write_bcr() local
148 dev->state = state; in pcnet_init()
158 state->padr[3], state->padr[4], state->padr[5]); in pcnet_init()
183 if (!state->td || !state->rd || !state->tx_buffers || !state->rx_buffers) { in pcnet_init()
206 state->ib->tdra = (uint32_t) state->td; in pcnet_init()
414 state->td_tail = (state->td_tail + 1) % state->td_count; in pcnet_service_tx()
484 state->rd_head = (state->rd_head + 1) % state->rd_count; in pcnet_service_rx()
[all …]
/dev/bus/pci/backend/
A Decam.cpp94 size_t offset = (size_t)state.bus << 20; in location_to_offset()
95 offset += (size_t)state.dev << 15; in location_to_offset()
96 offset += (size_t)state.fn << 12; in location_to_offset()
104 auto off = location_to_offset(state, reg); in read_config()
113 auto off = location_to_offset(state, reg); in write_config()
121 …LTRACEF_LEVEL(2, "state bus %#hhx dev %#hhx %#hhx reg %#x\n", state.bus, state.dev, state.fn, reg); in read_config_byte()
126 …LTRACEF_LEVEL(2, "state bus %#hhx dev %#hhx %#hhx reg %#x\n", state.bus, state.dev, state.fn, reg); in read_config_half()
131 …LTRACEF_LEVEL(2, "state bus %#hhx dev %#hhx %#hhx reg %#x\n", state.bus, state.dev, state.fn, reg); in read_config_word()
136 …LTRACEF_LEVEL(2, "state bus %#hhx dev %#hhx %#hhx reg %#x\n", state.bus, state.dev, state.fn, reg); in write_config_byte()
141 …LTRACEF_LEVEL(2, "state bus %#hhx dev %#hhx %#hhx reg %#x\n", state.bus, state.dev, state.fn, reg); in write_config_half()
[all …]
A Dtype1.cpp83 int pci_type1::read_config_byte(const pci_location_t state, uint32_t reg, uint8_t *value) { in read_config_byte() argument
84 …LTRACEF_LEVEL(2, "state bus %#hhx dev %#hhx %#hhx reg %#x\n", state.bus, state.dev, state.fn, reg); in read_config_byte()
85 *value = type1_read_byte(state.bus, state.dev, state.fn, reg); in read_config_byte()
89 int pci_type1::read_config_half(const pci_location_t state, uint32_t reg, uint16_t *value) { in read_config_half() argument
90 …LTRACEF_LEVEL(2, "state bus %#hhx dev %#hhx %#hhx reg %#x\n", state.bus, state.dev, state.fn, reg); in read_config_half()
91 *value = type1_read_half(state.bus, state.dev, state.fn, reg); in read_config_half()
95 int pci_type1::read_config_word(const pci_location_t state, uint32_t reg, uint32_t *value) { in read_config_word() argument
96 …LTRACEF_LEVEL(2, "state bus %#hhx dev %#hhx %#hhx reg %#x\n", state.bus, state.dev, state.fn, reg); in read_config_word()
97 *value = type1_read_word(state.bus, state.dev, state.fn, reg); in read_config_word()
A Dbios32.cpp198 bx = state.bus; in read_config_byte()
200 bx |= (state.dev << 3) | state.fn; in read_config_byte()
220 bx = state.bus; in read_config_half()
222 bx |= (state.dev << 3) | state.fn; in read_config_half()
242 bx = state.bus; in read_config_word()
244 bx |= (state.dev << 3) | state.fn; in read_config_word()
264 bx = state.bus; in write_config_byte()
266 bx |= (state.dev << 3) | state.fn; in write_config_byte()
286 bx = state.bus; in write_config_half()
288 bx |= (state.dev << 3) | state.fn; in write_config_half()
[all …]
A Dpci_backend.h30 virtual int read_config_byte(pci_location_t state, uint32_t reg, uint8_t *value) { in read_config_byte() argument
33 virtual int read_config_half(pci_location_t state, uint32_t reg, uint16_t *value) { in read_config_half() argument
36 virtual int read_config_word(pci_location_t state, uint32_t reg, uint32_t *value) { in read_config_word() argument
40 virtual int write_config_byte(pci_location_t state, uint32_t reg, uint8_t value) { in write_config_byte() argument
43 virtual int write_config_half(pci_location_t state, uint32_t reg, uint16_t value) { in write_config_half() argument
46 virtual int write_config_word(pci_location_t state, uint32_t reg, uint32_t value) { in write_config_word() argument
A Dbios32.h23 virtual int read_config_byte(pci_location_t state, uint32_t reg, uint8_t *value) override;
24 virtual int read_config_half(pci_location_t state, uint32_t reg, uint16_t *value) override;
25 virtual int read_config_word(pci_location_t state, uint32_t reg, uint32_t *value) override;
27 virtual int write_config_byte(pci_location_t state, uint32_t reg, uint8_t value) override;
28 virtual int write_config_half(pci_location_t state, uint32_t reg, uint16_t value) override;
29 virtual int write_config_word(pci_location_t state, uint32_t reg, uint32_t value) override;
A Decam.h20 int read_config_byte(pci_location_t state, uint32_t reg, uint8_t *value) override;
21 int read_config_half(pci_location_t state, uint32_t reg, uint16_t *value) override;
22 int read_config_word(pci_location_t state, uint32_t reg, uint32_t *value) override;
23 int write_config_byte(pci_location_t state, uint32_t reg, uint8_t value) override;
24 int write_config_half(pci_location_t state, uint32_t reg, uint16_t value) override;
25 int write_config_word(pci_location_t state, uint32_t reg, uint32_t value) override;
A Dtype1.h21 int read_config_byte(pci_location_t state, uint32_t reg, uint8_t *value) override;
22 int read_config_half(pci_location_t state, uint32_t reg, uint16_t *value) override;
23 int read_config_word(pci_location_t state, uint32_t reg, uint32_t *value) override;
/dev/bus/pci/include/dev/bus/
A Dpci.h52 status_t pci_read_config_byte(pci_location_t state, uint32_t reg, uint8_t *value);
53 status_t pci_read_config_half(pci_location_t state, uint32_t reg, uint16_t *value);
54 status_t pci_read_config_word(pci_location_t state, uint32_t reg, uint32_t *value);
56 status_t pci_write_config_byte(pci_location_t state, uint32_t reg, uint8_t value);
57 status_t pci_write_config_half(pci_location_t state, uint32_t reg, uint16_t value);
58 status_t pci_write_config_word(pci_location_t state, uint32_t reg, uint32_t value);
83 status_t pci_bus_mgr_find_device(pci_location_t *state, uint16_t device_id, uint16_t vendor_id, siz…
87 status_t pci_bus_mgr_find_device_by_class(pci_location_t *state, uint8_t base_class, uint8_t subcla…
/dev/timer/arm_cortex_a9/
A Darm_cortex_a9_timer.c107 spin_lock_saved_state_t state; in platform_set_periodic_timer() local
108 spin_lock_irqsave(&lock, state); in platform_set_periodic_timer()
120 spin_unlock_irqrestore(&lock, state); in platform_set_periodic_timer()
134 spin_lock_saved_state_t state; in platform_set_oneshot_timer() local
135 spin_lock_irqsave(&lock, state); in platform_set_oneshot_timer()
146 spin_unlock_irqrestore(&lock, state); in platform_set_oneshot_timer()
/dev/interrupt/or1k_pic/
A Dor1k_pic.c30 spin_lock_saved_state_t state; in register_int_handler() local
35 spin_lock_save(&gicd_lock, &state, GICD_LOCK_FLAGS); in register_int_handler()
40 spin_unlock_restore(&gicd_lock, state, GICD_LOCK_FLAGS); in register_int_handler()
/dev/include/dev/class/
A Dnetif.h21 status_t (*set_state)(struct device *dev, struct netstack_state *state);
33 status_t class_netif_set_state(struct device *dev, struct netstack_state *state);
43 status_t class_netstack_input(struct device *dev, struct netstack_state *state, struct pbuf *p);
/dev/bus/pci/
A Dpci.cpp44 status_t pci_read_config_byte(const pci_location_t state, uint32_t reg, uint8_t *value) { in pci_read_config_byte() argument
49 int res = pcib->read_config_byte(state, reg, value); in pci_read_config_byte()
53 status_t pci_read_config_half(const pci_location_t state, uint32_t reg, uint16_t *value) { in pci_read_config_half() argument
58 int res = pcib->read_config_half(state, reg, value); in pci_read_config_half()
63 status_t pci_read_config_word(const pci_location_t state, uint32_t reg, uint32_t *value) { in pci_read_config_word() argument
68 int res = pcib->read_config_word(state, reg, value); in pci_read_config_word()
73 status_t pci_write_config_byte(const pci_location_t state, uint32_t reg, uint8_t value) { in pci_write_config_byte() argument
78 int res = pcib->write_config_byte(state, reg, value); in pci_write_config_byte()
83 status_t pci_write_config_half(const pci_location_t state, uint32_t reg, uint16_t value) { in pci_write_config_half() argument
88 int res = pcib->write_config_half(state, reg, value); in pci_write_config_half()
[all …]
A Ddebug.cpp24 pci_location_t state; in pci_list() local
30 state.segment = segment; in pci_list()
33 state.bus = bus; in pci_list()
37 state.dev = dev; in pci_list()
40 state.fn = fn; in pci_list()
43 ret = pci_read_config_half(state, PCI_CONFIG_VENDOR_ID, &vendor_id); in pci_list()
52 ret = pci_read_config(state, &config); in pci_list()
58 state.segment, state.bus, state.dev, state.fn, in pci_list()
/dev/interrupt/arm_gic/
A Darm_gic.c92 spin_lock_saved_state_t state; in register_int_handler() local
97 spin_lock_save(&gicd_lock, &state, GICD_LOCK_FLAGS); in register_int_handler()
105 spin_unlock_restore(&gicd_lock, state, GICD_LOCK_FLAGS); in register_int_handler()
206 spin_lock_saved_state_t state; in arm_gic_resume_cpu() local
209 spin_lock_save(&gicd_lock, &state, GICD_LOCK_FLAGS); in arm_gic_resume_cpu()
217 spin_unlock_restore(&gicd_lock, state, GICD_LOCK_FLAGS); in arm_gic_resume_cpu()
437 spin_lock_saved_state_t state; in platform_irq() local
494 spin_lock_saved_state_t state; in smc_intc_get_next_irq() local
496 spin_lock_save(&gicd_lock, &state, GICD_LOCK_FLAGS); in smc_intc_get_next_irq()
523 spin_lock_saved_state_t state; in smc_intc_request_fiq() local
[all …]
/dev/virtio/net/
A Dvirtio-net.c251 spin_lock_saved_state_t state; in virtio_net_queue_tx_pktbuf() local
252 spin_lock_irqsave(&ndev->lock, state); in virtio_net_queue_tx_pktbuf()
261 spin_unlock_irqrestore(&ndev->lock, state); in virtio_net_queue_tx_pktbuf()
296 spin_unlock_irqrestore(&ndev->lock, state); in virtio_net_queue_tx_pktbuf()
337 spin_lock_saved_state_t state; in virtio_net_queue_rx() local
338 spin_lock_irqsave(&ndev->lock, state); in virtio_net_queue_rx()
360 spin_unlock_irqrestore(&ndev->lock, state); in virtio_net_queue_rx()
439 spin_lock_saved_state_t state; in virtio_net_rx_worker() local
440 spin_lock_irqsave(&ndev->lock, state); in virtio_net_rx_worker()
444 spin_unlock_irqrestore(&ndev->lock, state); in virtio_net_rx_worker()
/dev/class/
A Dnetif_api.c12 status_t class_netif_set_state(struct device *dev, struct netstack_state *state) { in class_netif_set_state() argument
18 return ops->set_state(dev, state); in class_netif_set_state()
/dev/include/dev/
A Ddriver.h32 void *state; member
86 .state = NULL, \
/dev/bus/pci/bus_mgr/
A Dbus_mgr.cpp213 status_t pci_bus_mgr_find_device(pci_location_t *state, uint16_t device_id, uint16_t vendor_id, siz… in pci_bus_mgr_find_device() argument
230 *state = d->loc(); in pci_bus_mgr_find_device()
240 status_t pci_bus_mgr_find_device_by_class(pci_location_t *state, uint8_t base_class, uint8_t sub_cl… in pci_bus_mgr_find_device_by_class() argument
261 *state = d->loc(); in pci_bus_mgr_find_device_by_class()
/dev/keys/
A Dgpio_keypad.c73 int state = bitmap_test(kp->keys_pressed, key_index); in check_output() local
74 keys_post_event(kpinfo->keymap[key_index], state); in check_output()
/dev/virtio/9p/
A Dclient.c147 spin_lock_saved_state_t state; in virtio_9p_req_send() local
148 spin_lock_irqsave(&p9dev->lock, state); in virtio_9p_req_send()
177 spin_unlock_irqrestore(&p9dev->lock, state); in virtio_9p_req_send()

Completed in 50 milliseconds