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Searched refs:ADC1_BASE (Results 1 – 24 of 24) sorted by relevance

/external/platform/stellaris/ti-driverlib/driverlib/
A Dadc.c110 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntRegister()
155 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntUnregister()
193 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntDisable()
222 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntEnable()
261 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntStatus()
322 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCIntClear()
350 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceEnable()
378 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceDisable()
451 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceConfigure()
545 ASSERT((ulBase == ADC0_BASE) || (ulBase == ADC1_BASE)); in ADCSequenceStepConfigure()
[all …]
/external/platform/stellaris/ti-driverlib/inc/
A Dhw_memmap.h94 #define ADC1_BASE 0x40039000 // ADC1 macro
/external/platform/stm32f0xx/CMSIS/inc/
A Dstm32f070x6.h507 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) macro
556 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f030x8.h474 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) macro
526 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f030x6.h464 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) macro
512 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f070xb.h522 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) macro
577 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f030xc.h485 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) macro
542 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f038xx.h474 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) macro
522 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f031x6.h475 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) macro
523 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f058xx.h563 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) macro
624 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f051x8.h564 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) macro
625 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f071xb.h588 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) macro
656 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f048xx.h632 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) macro
687 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f042x6.h632 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) macro
687 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f072xb.h690 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) macro
759 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f078xx.h690 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) macro
759 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f091xc.h657 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) macro
736 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f098xx.h657 #define ADC1_BASE (APBPERIPH_BASE + 0x00012400) macro
736 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
/external/platform/stm32f2xx/STM32F2xx_StdPeriph_Driver/CMSIS/
A Dstm32f2xx.h1060 #define ADC1_BASE (APB2PERIPH_BASE + 0x2000) macro
1163 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
/external/platform/stm32f1xx/STM32F10x_StdPeriph_Driver/CMSIS/
A Dstm32f10x.h1309 #define ADC1_BASE (APB2PERIPH_BASE + 0x2400) macro
1402 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
/external/platform/stm32f7xx/STM32F7xx_HAL_Driver/CMSIS/
A Dstm32f745xx.h1110 #define ADC1_BASE (APB2PERIPH_BASE + 0x2000) macro
1241 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f746xx.h1159 #define ADC1_BASE (APB2PERIPH_BASE + 0x2000) macro
1293 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
A Dstm32f756xx.h1226 #define ADC1_BASE (APB2PERIPH_BASE + 0x2000) macro
1363 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)
/external/platform/stm32f4xx/STM32F4xx_StdPeriph_Driver/CMSIS/
A Dstm32f4xx.h2141 #define ADC1_BASE (APB2PERIPH_BASE + 0x2000) macro
2333 #define ADC1 ((ADC_TypeDef *) ADC1_BASE)

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