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Searched refs:CoreDebug_DHCSR_S_SLEEP_Pos (Results 1 – 11 of 11) sorted by relevance

/external/arch/arm/arm-m/CMSIS/Include/
A Dcore_cm3.h1272 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1273 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
A Dcore_sc300.h1255 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1256 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
A Dcore_cm4.h1442 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1443 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
A Dcore_armv8mbl.h1018 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< \dep… macro
1019 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< \dep…
A Dcore_cm23.h1093 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< \dep… macro
1094 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< \dep…
A Dcore_cm7.h1669 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1670 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
A Dcore_cm33.h1835 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< \dep… macro
1836 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< \dep…
A Dcore_cm35p.h1835 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< \dep… macro
1836 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< \dep…
A Dcore_armv8mml.h1760 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< \dep… macro
1761 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< \dep…
A Dcore_armv81mml.h2659 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< \dep… macro
2660 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< \dep…
A Dcore_cm55.h2694 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< \dep… macro
2695 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< \dep…

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