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Searched refs:ITM (Results 1 – 9 of 9) sorted by relevance

/external/arch/arm/arm-m/CMSIS/Include/
A Dcore_cm3.h1393 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1880 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ in ITM_SendChar()
1881 ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1883 while (ITM->PORT[0U].u32 == 0UL) in ITM_SendChar()
1887 ITM->PORT[0U].u8 = (uint8_t)ch; in ITM_SendChar()
A Dcore_sc300.h1376 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
1854 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ in ITM_SendChar()
1855 ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ in ITM_SendChar()
1857 while (ITM->PORT[0U].u32 == 0UL) in ITM_SendChar()
1861 ITM->PORT[0U].u8 = (uint8_t)ch; in ITM_SendChar()
A Dcore_cm4.h1563 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
2066 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ in ITM_SendChar()
2067 ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ in ITM_SendChar()
2069 while (ITM->PORT[0U].u32 == 0UL) in ITM_SendChar()
2073 ITM->PORT[0U].u8 = (uint8_t)ch; in ITM_SendChar()
A Dcore_cm7.h1790 #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct… macro
2303 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ in ITM_SendChar()
2304 ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ in ITM_SendChar()
2306 while (ITM->PORT[0U].u32 == 0UL) in ITM_SendChar()
2310 ITM->PORT[0U].u8 = (uint8_t)ch; in ITM_SendChar()
A Dcore_cm33.h2211 …#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration stru… macro
3202 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ in ITM_SendChar()
3203 ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ in ITM_SendChar()
3205 while (ITM->PORT[0U].u32 == 0UL) in ITM_SendChar()
3209 ITM->PORT[0U].u8 = (uint8_t)ch; in ITM_SendChar()
A Dcore_cm35p.h2211 …#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration stru… macro
3202 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ in ITM_SendChar()
3203 ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ in ITM_SendChar()
3205 while (ITM->PORT[0U].u32 == 0UL) in ITM_SendChar()
3209 ITM->PORT[0U].u8 = (uint8_t)ch; in ITM_SendChar()
A Dcore_armv8mml.h2136 …#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration stru… macro
3134 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ in ITM_SendChar()
3135 ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ in ITM_SendChar()
3137 while (ITM->PORT[0U].u32 == 0UL) in ITM_SendChar()
3141 ITM->PORT[0U].u8 = (uint8_t)ch; in ITM_SendChar()
A Dcore_armv81mml.h3106 …#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration stru… macro
4153 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ in ITM_SendChar()
4154 ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ in ITM_SendChar()
4156 while (ITM->PORT[0U].u32 == 0UL) in ITM_SendChar()
4160 ITM->PORT[0U].u8 = (uint8_t)ch; in ITM_SendChar()
A Dcore_cm55.h3142 …#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration stru… macro
4214 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ in ITM_SendChar()
4215 ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ in ITM_SendChar()
4217 while (ITM->PORT[0U].u32 == 0UL) in ITM_SendChar()
4221 ITM->PORT[0U].u8 = (uint8_t)ch; in ITM_SendChar()

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