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Searched refs:MASK0 (Results 1 – 4 of 4) sorted by relevance

/external/arch/arm/arm-m/CMSIS/Include/
A Dcore_cm3.h857 __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ member
A Dcore_sc300.h842 __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ member
A Dcore_cm4.h915 __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ member
A Dcore_cm7.h1139 __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ member

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