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Searched refs:PRCM_BASE (Results 1 – 6 of 6) sorted by relevance

/external/platform/cc13xx/cc13xxware/driverlib/
A Dprcm.c332 HWREG(PRCM_BASE + PRCM_O_I2SMCLKDIV) = ui32MstDiv; in PRCMAudioClockConfigSet()
333 HWREG(PRCM_BASE + PRCM_O_I2SBCLKDIV) = ui32BitDiv; in PRCMAudioClockConfigSet()
377 HWREG(PRCM_BASE + PRCM_O_I2SMCLKDIV) = ui32MstDiv; in PRCMAudioClockConfigSetOverride()
411 HWREG(PRCM_BASE + in PRCMPowerDomainOn()
417 HWREG(PRCM_BASE + in PRCMPowerDomainOn()
422 HWREG(PRCM_BASE + in PRCMPowerDomainOn()
427 HWREG(PRCM_BASE + PRCM_O_PDCTL1VIMS) |= in PRCMPowerDomainOn()
458 HWREG(PRCM_BASE + in PRCMPowerDomainOff()
464 HWREG(PRCM_BASE + in PRCMPowerDomainOff()
469 HWREG(PRCM_BASE + in PRCMPowerDomainOff()
[all …]
A Dprcm.h311 HWREGBITW(PRCM_BASE + PRCM_O_VDCTL, PRCM_VDCTL_MCU_VD_BITN) = 1; in PRCMMcuPowerOff()
333 HWREGBITW(PRCM_BASE + PRCM_O_VDCTL, PRCM_VDCTL_MCU_VD_BITN) = 0; in PRCMMcuPowerOffCancel()
402 HWREG( PRCM_BASE + PRCM_O_GPTCLKDIV ) = clkDiv; in PRCMGPTimerClockDivisionSet()
428 return ( HWREG( PRCM_BASE + PRCM_O_GPTCLKDIV )); in PRCMGPTimerClockDivisionGet()
617 HWREG(PRCM_BASE + PRCM_O_RFCCLKG) = PRCM_RFCCLKG_CLK_EN; in PRCMDomainEnable()
621 HWREG(PRCM_BASE + PRCM_O_VIMSCLKG) = PRCM_VIMSCLKG_CLK_EN_M; in PRCMDomainEnable()
660 HWREG(PRCM_BASE + PRCM_O_RFCCLKG) = 0x0; in PRCMDomainDisable()
664 HWREG(PRCM_BASE + PRCM_O_VIMSCLKG) = 0x0; in PRCMDomainDisable()
1054 return ((HWREG(PRCM_BASE + PRCM_O_PDSTAT1RFC) & in PRCMRfReady()
1110 HWREG( PRCM_BASE + PRCM_O_RAMRETEN ) |= PRCM_RAMRETEN_VIMS_M; in PRCMCacheRetentionEnable()
[all …]
A Dchipinfo.c58 return ((ProtocolBitVector_t)( HWREG( PRCM_BASE + 0x1D4 ) & 0x0E )); in ChipInfo_GetSupportedProtocol_BV()
A Dsetup.c237 HWREGBITW( PRCM_BASE + PRCM_O_WARMRESET, PRCM_WARMRESET_WR_TO_PINRESET_BITN ) = 1; in trimDevice()
297 HWREG( PRCM_BASE + PRCM_O_PDCTL1VIMS ) = 0; in trimDevice()
A Dsys_ctrl.c418 prcmRamRetention = HWREG( PRCM_BASE + PRCM_O_RAMRETEN ); in SysCtrlSetRechargeBeforePowerDown()
/external/platform/cc13xx/cc13xxware/inc/
A Dhw_memmap.h72 #define PRCM_BASE 0x40082000 // PRCM macro

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