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Searched refs:SCB_CCR_DIV_0_TRP_Pos (Results 1 – 11 of 11) sorted by relevance

/external/arch/arm/arm-m/CMSIS/Include/
A Dcore_cm3.h502 #define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB … macro
503 #define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB …
A Dcore_sc300.h499 #define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB … macro
500 #define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB …
A Dcore_cm4.h560 #define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB … macro
561 #define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB …
A Dcore_armv8mbl.h516 #define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB … macro
517 #define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB …
A Dcore_cm23.h516 #define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB … macro
517 #define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB …
A Dcore_cm7.h614 #define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB … macro
615 #define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB …
A Dcore_cm33.h668 #define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB … macro
669 #define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB …
A Dcore_cm35p.h668 #define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB … macro
669 #define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB …
A Dcore_armv8mml.h668 #define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB … macro
669 #define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB …
A Dcore_armv81mml.h688 #define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB … macro
689 #define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB …
A Dcore_cm55.h688 #define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB … macro
689 #define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB …

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