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Searched refs:SCB_CPUID_REVISION_Pos (Results 1 – 17 of 17) sorted by relevance

/external/platform/stm32f0xx/STM32F0xx_HAL_Driver/inc/
A Dstm32f0xx_ll_cortex.h311 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_REVISION_Msk) >> SCB_CPUID_REVISION_Pos); in LL_CPUID_GetRevision()
/external/arch/arm/arm-m/CMSIS/Include/
A Dcore_cm0.h367 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
A Dcore_cm1.h367 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
A Dcore_sc000.h380 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
A Dcore_cm0plus.h385 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
A Dcore_cm3.h417 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
A Dcore_sc300.h419 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
A Dcore_cm4.h483 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
A Dcore_armv8mbl.h413 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
A Dcore_cm23.h413 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
A Dcore_cm7.h528 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
A Dcore_cm33.h564 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
A Dcore_cm35p.h564 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
A Dcore_armv8mml.h564 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
A Dcore_armv81mml.h572 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
A Dcore_cm55.h572 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro
/external/platform/pico/rp2_common/cmsis/stub/CMSIS/Core/Include/
A Dcore_cm0plus.h385 #define SCB_CPUID_REVISION_Pos 0U /*!< SCB … macro

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