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Searched refs:SCB_SCR_SLEEPDEEP_Pos (Results 1 – 17 of 17) sorted by relevance

/external/platform/lpc15xx/lpcopen/lpc_chip_15xx/src/
A Dpmu_15xx.c62 SCB->SCR |= (1UL << SCB_SCR_SLEEPDEEP_Pos); in Chip_PMU_DeepSleepState()
71 SCB->SCR |= (1UL << SCB_SCR_SLEEPDEEP_Pos); in Chip_PMU_PowerDownState()
81 SCB->SCR |= (1UL << SCB_SCR_SLEEPDEEP_Pos); in Chip_PMU_DeepPowerDownState()
/external/arch/arm/arm-m/CMSIS/Include/
A Dcore_cm0.h418 #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB … macro
419 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_cm1.h418 #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB … macro
419 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_sc000.h435 #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB … macro
436 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_cm0plus.h442 #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB … macro
443 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_cm3.h489 #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB … macro
490 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_sc300.h486 #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB … macro
487 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_cm4.h547 #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB … macro
548 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_armv8mbl.h494 #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB … macro
495 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_cm23.h494 #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB … macro
495 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_cm7.h592 #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB … macro
593 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_cm33.h646 #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB … macro
647 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_cm35p.h646 #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB … macro
647 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_armv8mml.h646 #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB … macro
647 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_armv81mml.h660 #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB … macro
661 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
A Dcore_cm55.h660 #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB … macro
661 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …
/external/platform/pico/rp2_common/cmsis/stub/CMSIS/Core/Include/
A Dcore_cm0plus.h442 #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB … macro
443 #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB …

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