Home
last modified time | relevance | path

Searched refs:TPR (Results 1 – 9 of 9) sorted by relevance

/external/arch/arm/arm-m/CMSIS/Include/
A Dcore_cm3.h769 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
A Dcore_sc300.h754 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
A Dcore_cm4.h827 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
A Dcore_cm7.h1051 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
A Dcore_cm33.h1025 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
A Dcore_cm35p.h1025 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
A Dcore_armv8mml.h1025 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
A Dcore_armv81mml.h1086 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member
A Dcore_cm55.h1086 __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ member

Completed in 723 milliseconds