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Searched refs:delay (Results 1 – 14 of 14) sorted by relevance

/external/platform/lpc15xx/lpcopen/lpc_chip_15xx/inc/
A Drom_spi_15xx.h83 uint32_t delay; /*!< Configures the delay between SSEL and data transfers and between frames. The member
A Dacmp_15xx.h395 STATIC INLINE void Chip_ACMP_SetPropagationDelay(LPC_CMP_T *pACMP, uint8_t index, uint8_t delay) in Chip_ACMP_SetPropagationDelay() argument
399 ((pACMP->ACMP[index].CMP & ~ACMP_INTFLAG_BIT) & ~ACMP_PROPDLY_MASK) | ((uint32_t) delay << 29); in Chip_ACMP_SetPropagationDelay()
/external/platform/pico/rp2040/hardware_structs/include/hardware/structs/
A Dclocks.h98 io_rw_32 delay;
/external/platform/lpc15xx/lpcopen/periph_spi_rom_polling/example/src/
A Dperiph_spi_rom_polling.c118 spiConfigRec.delay = 0x2222; in setupSpiMaster()
/external/platform/lpc15xx/lpcopen/periph_spi_rom_polling_slave/example/src/
A Dperiph_spi_rom_polling_slave.c118 spiConfigRec.delay = 0; in setupSpiSlave()
/external/platform/nrfx/drivers/src/
A Dnrfx_nfct.c583 uint32_t delay = p_param->data.fdt; in nrfx_nfct_parameter_set() local
586 m_nfct_cb.frame_delay_max = (delay > delay_thr) ? delay_thr : delay; in nrfx_nfct_parameter_set()
/external/platform/lpc15xx/lpcopen/periph_spi_rom_interrupt/example/src/
A Dperiph_spi_rom_interrupt.c121 spiConfigRec.delay = 0x2222; in setupSpiMaster()
/external/platform/lpc15xx/lpcopen/periph_spi_rom_interrupt_slave/example/src/
A Dperiph_spi_rom_interrupt_slave.c120 spiConfigRec.delay = 0; in setupSpiSlave()
/external/platform/lpc15xx/lpcopen/periph_pmu/example/
A Dreadme.dox38 * The wakeup timer is configurable, allowing the user to select the time delay
/external/platform/lpc15xx/lpcopen/periph_pmu_rom/example/
A Dreadme.dox38 * The wakeup timer is configurable, allowing the user to select the time delay
/external/platform/lpc15xx/lpcopen/periph_spi_rom_interrupt_slave/example/
A Dreadme.dox42 …* SPI data on UART, the master should allow sufficient (around 10ms) delay between each transfer. …
/external/platform/stm32f7xx/STM32F7xx_HAL_Driver/Src/
A Dstm32f7xx_hal_sd.c1109 uint32_t delay = 0; in HAL_SD_Erase() local
1178 for (; delay < maxdelay; delay++) { in HAL_SD_Erase()
1184 delay = SD_DATATIMEOUT; in HAL_SD_Erase()
1186 …while ((delay > 0) && (errorstate == SD_OK) && ((cardstate == SD_CARD_PROGRAMMING) || (cardstate =… in HAL_SD_Erase()
1188 delay--; in HAL_SD_Erase()
/external/platform/lpc15xx/lpcopen/periph_spi_rom_polling_slave/example/
A Dreadme.dox42 …* SPI data on UART, the master should allow sufficient (around 10ms) delay between each transfer. …
/external/platform/lpc15xx/lpcopen/periph_systick/example/
A Dreadme.dox40 * While one would expect a clock divider to delay an interrupt occurrence this implementation

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