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Searched refs:pin (Results 1 – 25 of 25) sorted by relevance

/external/platform/nrfx/drivers/src/
A Dnrfx_gpiote.c86 return (m_cb.pin_assignments[pin] >= 0 && m_cb.pin_assignments[pin] < GPIOTE_CH_NUM) ? in pin_in_use_by_te()
287 if (pin_in_use(pin)) in nrfx_gpiote_out_init()
341 if (pin_in_use_by_te(pin)) in nrfx_gpiote_out_uninit()
346 pin_in_use_clear(pin); in nrfx_gpiote_out_uninit()
362 nrf_gpio_pin_set(pin); in nrfx_gpiote_out_set()
372 nrf_gpio_pin_clear(pin); in nrfx_gpiote_out_clear()
382 nrf_gpio_pin_toggle(pin); in nrfx_gpiote_out_toggle()
627 if (pin_in_use_by_te(pin)) in nrfx_gpiote_in_uninit()
637 pin_in_use_clear(pin); in nrfx_gpiote_in_uninit()
651 NRFX_ASSERT(pin_in_use_by_port(pin) || pin_in_use_by_te(pin)); in nrfx_gpiote_in_event_get()
[all …]
A Dnrfx_pwm.c122 uint32_t pin = nrf_pwm_pin_get(p_instance->p_registers, ch_idx); in deconfigure_pins() local
123 if (pin != NRF_PWM_PIN_NOT_CONNECTED) in deconfigure_pins()
125 nrf_gpio_cfg_default(pin); in deconfigure_pins()
A Dnrfx_twis.c146 static inline void nrfx_twis_config_pin(uint32_t pin, nrf_gpio_pin_pull_t pull) in nrfx_twis_config_pin() argument
148 nrf_gpio_cfg(pin, in nrfx_twis_config_pin()
A Dnrfx_spis.c95 static void csn_event_handler(nrfx_gpiote_pin_t pin, in csn_event_handler() argument
/external/platform/nrfx/drivers/include/
A Dnrfx_gpiote.h252 void nrfx_gpiote_out_uninit(nrfx_gpiote_pin_t pin);
259 void nrfx_gpiote_out_set(nrfx_gpiote_pin_t pin);
266 void nrfx_gpiote_out_clear(nrfx_gpiote_pin_t pin);
273 void nrfx_gpiote_out_toggle(nrfx_gpiote_pin_t pin);
280 void nrfx_gpiote_out_task_enable(nrfx_gpiote_pin_t pin);
287 void nrfx_gpiote_out_task_disable(nrfx_gpiote_pin_t pin);
389 void nrfx_gpiote_in_uninit(nrfx_gpiote_pin_t pin);
408 void nrfx_gpiote_in_event_disable(nrfx_gpiote_pin_t pin);
418 bool nrfx_gpiote_in_is_set(nrfx_gpiote_pin_t pin);
457 void nrfx_gpiote_out_task_trigger(nrfx_gpiote_pin_t pin);
[all …]
/external/platform/lpc15xx/lpcopen/lpc_chip_15xx/src/
A Dswm_15xx.c60 LPC_SWM->PINASSIGN[regIndex] = temp | (pin << pinshift); in Chip_SWM_MovablePinAssign()
64 void Chip_SWM_EnableFixedPin(CHIP_SWM_PIN_FIXED_T pin) in Chip_SWM_EnableFixedPin() argument
68 pinPos = ((uint32_t) pin) & 0x1F; in Chip_SWM_EnableFixedPin()
69 regOff = ((uint32_t) pin) >> 7; in Chip_SWM_EnableFixedPin()
76 void Chip_SWM_DisableFixedPin(CHIP_SWM_PIN_FIXED_T pin) in Chip_SWM_DisableFixedPin() argument
80 pinPos = ((uint32_t) pin) & 0x1F; in Chip_SWM_DisableFixedPin()
81 regOff = ((uint32_t) pin) >> 7; in Chip_SWM_DisableFixedPin()
91 Chip_SWM_EnableFixedPin(pin); in Chip_SWM_FixedPinEnable()
94 Chip_SWM_DisableFixedPin(pin); in Chip_SWM_FixedPinEnable()
103 pinPos = ((uint32_t) pin) & 0x1F; in Chip_SWM_IsFixedPinEnabled()
[all …]
A Dgpio_15xx.c93 void Chip_GPIO_SetPinDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin, bool output) in Chip_GPIO_SetPinDIR() argument
96 Chip_GPIO_SetPinDIROutput(pGPIO, port, pin); in Chip_GPIO_SetPinDIR()
99 Chip_GPIO_SetPinDIRInput(pGPIO, port, pin); in Chip_GPIO_SetPinDIR()
A Diocon_15xx.c54 Chip_IOCON_PinMuxSet(pIOCON, pinArray[ix].port, pinArray[ix].pin, pinArray[ix].modefunc); in Chip_IOCON_SetPinMuxing()
/external/platform/lpc15xx/lpcopen/lpc_chip_15xx/inc/
A Dgpio_15xx.h83 pGPIO->B[port][pin] = setting; in Chip_GPIO_WritePortBit()
97 pGPIO->B[port][pin] = setting; in Chip_GPIO_SetPinState()
110 return (bool) pGPIO->B[port][pin]; in Chip_GPIO_ReadPortBit()
123 return (bool) pGPIO->B[port][pin]; in Chip_GPIO_GetPinState()
148 pGPIO->DIR[port] |= 1UL << pin; in Chip_GPIO_SetPinDIROutput()
160 pGPIO->DIR[port] &= ~(1UL << pin); in Chip_GPIO_SetPinDIRInput()
171 void Chip_GPIO_SetPinDIR(LPC_GPIO_T *pGPIO, uint8_t port, uint8_t pin, bool output);
195 return (bool) (((pGPIO->DIR[port]) >> pin) & 1); in Chip_GPIO_GetPinDIR()
377 pGPIO->SET[port] = (1 << pin); in Chip_GPIO_SetPinOutHigh()
419 pGPIO->CLR[port] = (1 << pin); in Chip_GPIO_SetPinOutLow()
[all …]
A Diocon_15xx.h56 uint32_t pin : 8; /* Pin number */ member
95 STATIC INLINE void Chip_IOCON_PinMuxSet(LPC_IOCON_T *pIOCON, uint8_t port, uint8_t pin, uint32_t mo… in Chip_IOCON_PinMuxSet() argument
97 pIOCON->PIO[port][pin] = modefunc; in Chip_IOCON_PinMuxSet()
109 STATIC INLINE void Chip_IOCON_PinMux(LPC_IOCON_T *pIOCON, uint8_t port, uint8_t pin, uint16_t mode,… in Chip_IOCON_PinMux() argument
111 Chip_IOCON_PinMuxSet(pIOCON, port, pin, (uint32_t) (mode | func)); in Chip_IOCON_PinMux()
A Dswm_15xx.h232 …NLINE void Chip_SWM_MovablePortPinAssign(CHIP_SWM_PIN_MOVABLE_T movable, uint8_t port, uint8_t pin) in Chip_SWM_MovablePortPinAssign() argument
234 Chip_SWM_MovablePinAssign(movable, ((port * 32) + pin)); in Chip_SWM_MovablePortPinAssign()
242 void Chip_SWM_EnableFixedPin(CHIP_SWM_PIN_FIXED_T pin);
249 void Chip_SWM_DisableFixedPin(CHIP_SWM_PIN_FIXED_T pin);
257 void Chip_SWM_FixedPinEnable(CHIP_SWM_PIN_FIXED_T pin, bool enable);
264 bool Chip_SWM_IsFixedPinEnabled(CHIP_SWM_PIN_FIXED_T pin);
/external/platform/pico/rp2_common/pico_cyw43_driver/include/
A Dcyw43_configport.h98 static inline int cyw43_hal_pin_read(cyw43_hal_pin_obj_t pin) { in cyw43_hal_pin_read() argument
99 return gpio_get(pin); in cyw43_hal_pin_read()
102 static inline void cyw43_hal_pin_low(cyw43_hal_pin_obj_t pin) { in cyw43_hal_pin_low() argument
103 gpio_clr_mask(1 << pin); in cyw43_hal_pin_low()
106 static inline void cyw43_hal_pin_high(cyw43_hal_pin_obj_t pin) { in cyw43_hal_pin_high() argument
107 gpio_set_mask(1 << pin); in cyw43_hal_pin_high()
117 static inline void cyw43_hal_pin_config(cyw43_hal_pin_obj_t pin, uint32_t mode, uint32_t pull, __un… in cyw43_hal_pin_config() argument
119 gpio_set_dir(pin, mode); in cyw43_hal_pin_config()
120 gpio_set_pulls(pin, pull == CYW43_HAL_PIN_PULL_UP, pull == CYW43_HAL_PIN_PULL_DOWN); in cyw43_hal_pin_config()
/external/platform/pico/rp2_common/hardware_pio/
A Dpio.c214 void pio_sm_set_consecutive_pindirs(PIO pio, uint sm, uint pin, uint count, bool is_out) { in pio_sm_set_consecutive_pindirs() argument
217 valid_params_if(PIO, pin < 32u); in pio_sm_set_consecutive_pindirs()
223 …pio->sm[sm].pinctrl = (5u << PIO_SM0_PINCTRL_SET_COUNT_LSB) | (pin << PIO_SM0_PINCTRL_SET_BASE_LSB… in pio_sm_set_consecutive_pindirs()
226 pin = (pin + 5) & 0x1f; in pio_sm_set_consecutive_pindirs()
228 …pio->sm[sm].pinctrl = (count << PIO_SM0_PINCTRL_SET_COUNT_LSB) | (pin << PIO_SM0_PINCTRL_SET_BASE_… in pio_sm_set_consecutive_pindirs()
/external/platform/nrfx/hal/
A Dnrf_gpiote.h296 uint32_t pin,
349 uint32_t pin,
508 uint32_t pin, in nrf_gpiote_event_configure() argument
512 p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) | in nrf_gpiote_event_configure()
553 uint32_t pin, in nrf_gpiote_task_configure() argument
561 p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) | in nrf_gpiote_task_configure()
A Dnrf_spim.h404 uint32_t pin,
709 uint32_t pin, in nrf_spim_csn_configure() argument
713 p_reg->PSEL.CSN = pin; in nrf_spim_csn_configure()
A Dnrf_qspi.h92 #define NRF_QSPI_PIN_VAL(pin) (pin) == NRF_QSPI_PIN_NOT_CONNECTED ? 0xFFFFFFFF : (pin) argument
A Dnrf_gpio.h72 #define NRF_GPIO_PIN_MAP(port, pin) (((port) << 5) | ((pin) & 0x1F)) argument
/external/platform/lpc15xx/lpcopen/lpc_board_nxp_lpcxpresso_1549/src/
A Dboard_sysinit.c92 uint16_t pin : 5; /* Pin number */ member
141 swmSetup[i].port, swmSetup[i].pin); in Board_SetupMuxing()
/external/platform/lpc15xx/lpcopen/periph_pinint/example/
A Dreadme.dox35 * The Pin interrupt example demonstrates using the pin interrupt API functions.<br>
37 * This example configures a pin interrupt as a falling edge interrupt.
40 * The application will spin in a loop. With every pin interrupt the
/external/platform/pico/rp2_common/hardware_pio/include/hardware/
A Dpio.h277 static inline void sm_config_set_jmp_pin(pio_sm_config *c, uint pin) { in sm_config_set_jmp_pin() argument
278 valid_params_if(PIO, pin < 32); in sm_config_set_jmp_pin()
280 (pin << PIO_SM0_EXECCTRL_JMP_PIN_LSB); in sm_config_set_jmp_pin()
433 static inline void pio_gpio_init(PIO pio, uint pin) { in pio_gpio_init() argument
435 valid_params_if(PIO, pin < 32); in pio_gpio_init()
436 gpio_set_function(pin, pio == pio0 ? GPIO_FUNC_PIO0 : GPIO_FUNC_PIO1); in pio_gpio_init()
A Dpio_instructions.h285 static inline uint pio_encode_wait_pin(bool polarity, uint pin) { in pio_encode_wait_pin() argument
286 return _pio_encode_instr_and_args(pio_instr_bits_wait, 1u | (polarity ? 4u : 0u), pin); in pio_encode_wait_pin()
/external/platform/lpc15xx/lpcopen/periph_clkout/example/
A Dreadme.dox36 * clock source on the CLKOUT pin. To use this example, you'll need to
37 * connect an oscilloscope to the CLKOUT pin on your board. See the
/external/platform/nrfx/
A DCHANGELOG.md41 - Unified policy of pin cleanup procedure during uninitialization of the drivers. Now every driver …
48 - Fixed assertions that check pin numbers in the GPIO HAL and GPIOTE driver. Now noncontiguous grou…
95 - Added function in the GPIO HAL for selecting the MCU to control the specified pin.
113 - Changed the way of configuring the MISO pin pull setting in SPI and SPIM drivers. Now it can be s…
123 - Added functions in the GPIOTE driver for getting task or event for the specified GPIO pin.
205 - Added function for reading the pin input buffer configuration in the GPIO HAL.
272 - Added function for reading the pin pull configuration in the GPIO HAL.
312 - Extended input pin configuration in the GPIOTE driver.
/external/platform/lpc15xx/lpcopen/periph_gpio/example/
A Dreadme.dox36 * for multiple GPIO pin functions at once. The example will operate on multiple GPIO
/external/platform/lpc15xx/lpcopen/periph_freqmeas/example/
A Dreadme.dox43 * CLKOUT pin) as reference clocks.<br>

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