Searched refs:power (Results 1 – 7 of 7) sorted by relevance
| /external/platform/lpc15xx/lpcopen/periph_pmu/example/ |
| A D | readme.dox | 35 * The PMU example demonstrates power state change using the RTC timer to wake-up
36 * the MCU from the following low power states, SLEEP, DEEP SLEEP, POWER DOWN,
39 * between power state changes. The chip is then placed into a low power mode and
40 * will wakeup from the RTC timer event. PMU power modes tested are:<br>
45 * The UART serial output from the board will announce each power state change.<br>
47 * goes into low power states.</i><br>
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| /external/platform/lpc15xx/lpcopen/periph_pmu_rom/example/ |
| A D | readme.dox | 35 * The PMU example demonstrates power state change using the RTC timer to wake-up
36 * the MCU from the following low power states, SLEEP, DEEP SLEEP, POWER DOWN,
39 * between power state changes. The chip is then placed into a low power mode and
40 * will wakeup from the RTC timer event. PMU power modes tested are:<br>
45 * The UART serial output from the board will announce each power state change.<br>
47 * goes into low power states.</i><br>
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| /external/platform/pico/rp2_common/hardware_pll/ |
| A D | pll.c | 59 uint32_t power = PLL_PWR_PD_BITS | // Main power in pll_init() local
62 hw_clear_bits(&pll->pwr, power); in pll_init()
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| /external/platform/cc13xx/cc13xxware/ |
| A D | README | 11 collateral for the SimpleLink™ ultra-low power platform of devices (CC13xx).
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| /external/platform/lpc15xx/lpcopen/usbd_rom_cdc_uart/example/ |
| A D | readme.dox | 45 * J54 & J55 on base board and power the system through USB port connected to FTDI chip. Note,
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| /external/platform/pico/rp2_common/cmsis/stub/CMSIS/ |
| A D | LICENSE.txt | 18 "control" means (i) the power, direct or indirect, to cause the
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| /external/platform/nrfx/ |
| A D | CHANGELOG.md | 214 …earing in NVIC in the nrfx_usbd_stop() function. The driver now correctly handles power management.
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