INT_POL_CTL0 (reference) in projects: platform

Searched refs:INT_POL_CTL0 (Results 1 – 3 of 3) sorted by relevance

/platform/mediatek/mt6735/
A D	interrupts.c	`62 #define INT_POL_CTL0 (MCUCFG_BASE + 0x620) macro 186 value = DRV_Reg32(INT_POL_CTL0 + (reg_index * 4)); in mt_irq_set_polarity() 188 DRV_WriteReg32((INT_POL_CTL0 + (reg_index * 4)), value); in mt_irq_set_polarity() 190 value = DRV_Reg32(INT_POL_CTL0 + (reg_index * 4)); in mt_irq_set_polarity() 192 DRV_WriteReg32(INT_POL_CTL0 + (reg_index * 4), value); in mt_irq_set_polarity()`
/platform/mediatek/mt6797/include/platform/
A D	mt_irq.h	`25 #define INT_POL_CTL0 (MCUCFG_BASE + 0x620) macro`
/platform/mediatek/common/gic/
A D	mt_gic_v3.c	`242 value = DRV_Reg32(INT_POL_CTL0 + (reg_index * 4)); in mt_irq_set_polarity() 244 DRV_WriteReg32((INT_POL_CTL0 + (reg_index * 4)), value); in mt_irq_set_polarity() 246 value = DRV_Reg32(INT_POL_CTL0 + (reg_index * 4)); in mt_irq_set_polarity() 248 DRV_WriteReg32(INT_POL_CTL0 + (reg_index * 4), value); in mt_irq_set_polarity()`

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