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Searched refs:clk_reg (Results 1 – 1 of 1) sorted by relevance

/platform/zynq/
A Dclocks.c251 addr_t clk_reg = periph_clk_ctrl_reg(periph); in zynq_set_clock() local
252 DEBUG_ASSERT(clk_reg != 0); in zynq_set_clock()
260 uint32_t ctrl = *REG32(clk_reg); in zynq_set_clock()
270 *REG32(clk_reg) = ctrl; in zynq_set_clock()
274 uint32_t ctrl = *REG32(clk_reg); in zynq_set_clock()
278 *REG32(clk_reg) = ctrl; in zynq_set_clock()
291 addr_t clk_reg = periph_clk_ctrl_reg(periph); in zynq_get_clock() local
292 DEBUG_ASSERT(clk_reg != 0); in zynq_get_clock()
296 LTRACEF("clkreg 0x%x\n", *REG32(clk_reg)); in zynq_get_clock()
308 switch (BITS_SHIFT(*REG32(clk_reg), 5, 4)) { in zynq_get_clock()
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