Searched refs:mask (Results 1 – 10 of 10) sorted by relevance
216 unsigned int mask = 1 << (irq % 32); in mt_irq_mask() local227 unsigned int mask = 1 << (irq % 32); in mt_irq_unmask() local248 if (mask) { in mt_irq_mask_all()270 mask->header = IRQ_MASK_HEADER; in mt_irq_mask_all()271 mask->footer = IRQ_MASK_FOOTER; in mt_irq_mask_all()285 if (!mask) { in mt_irq_mask_restore()288 if (mask->header != IRQ_MASK_HEADER) { in mt_irq_mask_restore()291 if (mask->footer != IRQ_MASK_FOOTER) { in mt_irq_mask_restore()295 DRV_WriteReg32(GIC_ICDISER0,mask->mask0); in mt_irq_mask_restore()296 DRV_WriteReg32(GIC_ICDISER1,mask->mask1); in mt_irq_mask_restore()[all …]
18 unsigned int mask[IRQ_REGS]; member22 int mt_irq_mask_all(struct mtk_irq_mask *mask); //(This is ONLY used for the sleep driver)23 int mt_irq_mask_restore(struct mtk_irq_mask *mask); //(This is ONLY used for the sleep driver)
272 unsigned int mask = 1 << (irq % 32); in mt_irq_mask() local283 unsigned int mask = 1 << (irq % 32); in mt_irq_unmask() local303 int mt_irq_mask_all(struct mtk_irq_mask *mask) { in mt_irq_mask_all() argument306 if (mask) { in mt_irq_mask_all()308 mask->mask[i] = DRV_Reg32(GIC_DIST_BASE + GIC_DIST_ENABLE_SET + i * 4); in mt_irq_mask_all()314 mask->header = IRQ_MASK_HEADER; in mt_irq_mask_all()315 mask->footer = IRQ_MASK_FOOTER; in mt_irq_mask_all()331 if (!mask) { in mt_irq_mask_restore()334 if (mask->header != IRQ_MASK_HEADER) { in mt_irq_mask_restore()337 if (mask->footer != IRQ_MASK_FOOTER) { in mt_irq_mask_restore()[all …]
20 unsigned mask = 0x7; in gpio_config() local21 if (nr >= NUM_PINS || flags & ~mask) in gpio_config()25 unsigned shifted_mask = mask << offset; in gpio_config()
107 int mt_irq_mask_all(struct mtk_irq_mask *mask); //(This is ONLY used for the sleep driver)108 int mt_irq_mask_restore(struct mtk_irq_mask *mask); //(This is ONLY used for the sleep driver)111 int mt_irq_mask_restore(struct mtk_irq_mask *mask);
123 void stm32_can_filter_set_mask32(uint32_t filter, uint32_t id, uint32_t mask) { in stm32_can_filter_set_mask32() argument139 can->sFilterRegister[filter].FR2 = mask; in stm32_can_filter_set_mask32()
36 uint32_t mask = *REG32(GPIO_INT_MASK(bank)); in gpio_int_handler() local38 uint32_t active = ~mask & stat; in gpio_int_handler()
49 static inline int reg_poll(uint32_t addr,uint32_t mask) { in reg_poll() argument51 while (iters-- && !(*REG32(addr) & mask)) ; in reg_poll()
303 uint32_t mask; member
63 …tatus_t qspi_auto_polling_mem_ready_unsafe(QSPI_HandleTypeDef *hqspi, uint8_t match, uint8_t mask);220 …atus_t qspi_auto_polling_mem_ready_unsafe(QSPI_HandleTypeDef *hqspi, uint8_t match, uint8_t mask) { in qspi_auto_polling_mem_ready_unsafe() argument238 s_config.Mask = mask; in qspi_auto_polling_mem_ready_unsafe()
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