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Searched refs:vector (Results 1 – 13 of 13) sorted by relevance

/platform/armemu/
A Dinterrupts.c33 if (vector >= PIC_MAX_INT) in mask_interrupt()
38 *REG32(PIC_MASK_LATCH) = 1 << vector; in mask_interrupt()
44 if (vector >= PIC_MAX_INT) in unmask_interrupt()
49 *REG32(PIC_UNMASK_LATCH) = 1 << vector; in unmask_interrupt()
57 if (vector == 0xffffffff) in platform_irq()
61 KEVLOG_IRQ_ENTER(vector); in platform_irq()
69 if (int_handler_table[vector].handler) in platform_irq()
70 ret = int_handler_table[vector].handler(int_handler_table[vector].arg); in platform_irq()
74 KEVLOG_IRQ_EXIT(vector); in platform_irq()
84 if (vector >= PIC_MAX_INT) in register_int_handler()
[all …]
/platform/qemu-virt-m68k/
A Dpic.c60 return vector / 32; in irq_to_pic_num()
64 return vector % 32; in irq_to_pic_vec()
75 LTRACEF("vector %u\n", vector); in mask_interrupt()
76 write_reg(irq_to_pic_num(vector), REG_DISABLE, 1U << irq_to_pic_vec(vector)); in mask_interrupt()
81 LTRACEF("vector %u\n", vector); in unmask_interrupt()
82 write_reg(irq_to_pic_num(vector), REG_ENABLE, 1U << irq_to_pic_vec(vector)); in unmask_interrupt()
92 handlers[vector].arg = arg; in register_int_handler()
119 KEVLOG_IRQ_ENTER(vector); in m68k_platform_irq()
122 if (handlers[vector].handler) { in m68k_platform_irq()
123 ret = handlers[vector].handler(handlers[vector].arg); in m68k_platform_irq()
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/platform/pc/
A Dinterrupts.c62 if (vector >= INT_VECTORS) in mask_interrupt()
81 if (vector >= INT_VECTORS) in unmask_interrupt()
90 pic_enable(vector, true); in unmask_interrupt()
101 unsigned int vector = frame->vector; in platform_irq() local
110 lapic_eoi(vector); in platform_irq()
112 pic_eoi(vector); in platform_irq()
125 lapic_eoi(vector); in platform_irq()
127 pic_eoi(vector); in platform_irq()
140 int_table[vector].arg = arg; in register_int_handler_etc()
170 *vector = out_vector; in platform_pci_int_to_vector()
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A Dpic.c70 void pic_enable(unsigned int vector, bool enable) { in pic_enable() argument
71 if (vector >= INT_PIC1_BASE && vector < INT_PIC1_BASE + 8) { in pic_enable()
72 vector -= INT_PIC1_BASE; in pic_enable()
74 uint8_t bit = 1 << vector; in pic_enable()
87 } else if (vector >= INT_PIC2_BASE && vector < INT_PIC2_BASE + 8) { in pic_enable()
88 vector -= INT_PIC2_BASE; in pic_enable()
90 uint8_t bit = 1 << vector; in pic_enable()
120 void pic_eoi(unsigned int vector) { in pic_eoi() argument
121 if (vector >= INT_PIC1_BASE && vector <= INT_PIC1_BASE + 7) { in pic_eoi()
123 } else if (vector >= INT_PIC2_BASE && vector <= INT_PIC2_BASE + 7) { in pic_eoi()
A Dplatform_p.h21 void pic_enable(unsigned int vector, bool enable);
22 void pic_eoi(unsigned int vector);
/platform/bcm28xx/
A Dintc.c86 LTRACEF("vector %u\n", vector); in mask_interrupt()
91 if (vector >= INTERRUPT_ARM_LOCAL_CNTPSIRQ && vector <= INTERRUPT_ARM_LOCAL_CNTVIRQ) { in mask_interrupt()
100 if (vector >= ARM_IRQ0_BASE) in mask_interrupt()
118 LTRACEF("vector %u\n", vector); in unmask_interrupt()
123 if (vector >= INTERRUPT_ARM_LOCAL_CNTPSIRQ && vector <= INTERRUPT_ARM_LOCAL_CNTVIRQ) { in unmask_interrupt()
132 if (vector >= ARM_IRQ0_BASE) in unmask_interrupt()
150 if (vector >= MAX_INT) in register_int_handler()
163 uint vector; in platform_irq() local
211 vector = 0xffffffff; in platform_irq()
235 if (vector == 0xffffffff) { in platform_irq()
[all …]
/platform/include/platform/
A Dinterrupts.h21 status_t mask_interrupt(unsigned int vector);
22 status_t unmask_interrupt(unsigned int vector);
25 void register_int_handler(unsigned int vector, int_handler handler, void *arg);
30 void register_int_handler_msi(unsigned int vector, int_handler handler, void *arg, bool edge);
35 status_t platform_allocate_interrupts(size_t count, uint align_log2, bool msi, unsigned int *vector…
40 status_t platform_pci_int_to_vector(unsigned int pci_int, unsigned int *vector);
43 status_t platform_compute_msi_values(unsigned int vector, unsigned int cpu, bool edge,
/platform/qemu-mips/
A Dintc.c92 if (vector < 8) { in enable()
106 } else if (vector < 16) { in enable()
107 vector -= 8; in enable()
140 if (vector < 8) { in issueEOI()
142 } else if (vector < 16) { in issueEOI()
173 if (vector >= INT_VECTORS) in mask_interrupt()
181 enable(vector, false); in mask_interrupt()
200 if (vector >= INT_VECTORS) in unmask_interrupt()
208 enable(vector, true); in unmask_interrupt()
234 vector = val; in platform_irq()
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/platform/microblaze/
A Dintc.c42 void register_int_handler(unsigned int vector, int_handler handler, void *arg) { in register_int_handler() argument
43 LTRACEF("vector %u, handler %p, arg %p\n", vector, handler, arg); in register_int_handler()
45 if (vector >= MAX_INT) in register_int_handler()
51 int_handler_table[vector].handler = handler; in register_int_handler()
52 int_handler_table[vector].arg = arg; in register_int_handler()
57 status_t mask_interrupt(unsigned int vector) { in mask_interrupt() argument
58 LTRACEF("vector %u\n", vector); in mask_interrupt()
60 INTC_REG(R_CIE) = 1 << vector; in mask_interrupt()
65 status_t unmask_interrupt(unsigned int vector) { in unmask_interrupt() argument
66 LTRACEF("vector %u\n", vector); in unmask_interrupt()
[all …]
/platform/spacemit-k1/
A Dplatform.c86 status_t platform_pci_int_to_vector(unsigned int pci_int, unsigned int *vector) { in platform_pci_int_to_vector() argument
88 *vector = pci_int; in platform_pci_int_to_vector()
92 status_t platform_allocate_interrupts(size_t count, uint align_log2, bool msi, unsigned int *vector… in platform_allocate_interrupts() argument
96 status_t platform_compute_msi_values(unsigned int vector, unsigned int cpu, bool edge, in platform_compute_msi_values() argument
/platform/jh7110/
A Dplatform.c98 status_t platform_pci_int_to_vector(unsigned int pci_int, unsigned int *vector) { in platform_pci_int_to_vector() argument
100 *vector = pci_int; in platform_pci_int_to_vector()
104 status_t platform_allocate_interrupts(size_t count, uint align_log2, bool msi, unsigned int *vector… in platform_allocate_interrupts() argument
108 status_t platform_compute_msi_values(unsigned int vector, unsigned int cpu, bool edge, in platform_compute_msi_values() argument
/platform/qemu-virt-arm/
A Dplatform.c138 status_t platform_pci_int_to_vector(unsigned int pci_int, unsigned int *vector) { in platform_pci_int_to_vector() argument
143 *vector = pci_int + PCIE_INT_BASE; in platform_pci_int_to_vector()
147 status_t platform_allocate_interrupts(size_t count, uint align_log2, bool msi, unsigned int *vector… in platform_allocate_interrupts() argument
180 *vector = allocated; in platform_allocate_interrupts()
184 status_t platform_compute_msi_values(unsigned int vector, unsigned int cpu, bool edge, in platform_compute_msi_values() argument
194 *msi_data_out = vector; in platform_compute_msi_values()
/platform/qemu-virt-riscv/
A Dplatform.c143 status_t platform_pci_int_to_vector(unsigned int pci_int, unsigned int *vector) { in platform_pci_int_to_vector() argument
145 *vector = pci_int; in platform_pci_int_to_vector()
149 status_t platform_allocate_interrupts(size_t count, uint align_log2, bool msi, unsigned int *vector… in platform_allocate_interrupts() argument
153 status_t platform_compute_msi_values(unsigned int vector, unsigned int cpu, bool edge, in platform_compute_msi_values() argument

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