Home
last modified time | relevance | path

Searched refs:TIMREG (Results 1 – 1 of 1) sorted by relevance

/dev/timer/arm_cortex_a9/
A Darm_cortex_a9_timer.c36 #define TIMREG(reg) (*REG32(scu_control_base + PRIV_TIMER_OFFSET + (reg))) macro
115 TIMREG(TIMER_CONTROL) = 0; in platform_set_periodic_timer()
117 TIMREG(TIMER_LOAD) = ticks; in platform_set_periodic_timer()
141 TIMREG(TIMER_CONTROL) = 0; in platform_set_oneshot_timer()
143 TIMREG(TIMER_LOAD) = ticks; in platform_set_oneshot_timer()
144 TIMREG(TIMER_CONTROL) = (1<<2) | (1<<0) | (1<<0); // irq enable, oneshot, enable in platform_set_oneshot_timer()
154 TIMREG(TIMER_CONTROL) = 0; in platform_stop_timer()
160 TIMREG(TIMER_ISR) = 1; // ack the irq in platform_tick()
185 TIMREG(TIMER_CONTROL) = 0; in arm_cortex_a9_timer_init_percpu()
188 TIMREG(WDOG_CONTROL) = 0; in arm_cortex_a9_timer_init_percpu()
[all …]

Completed in 8 milliseconds