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Searched refs:ui32Base (Results 1 – 22 of 22) sorted by relevance

/external/platform/cc13xx/cc13xxware/driverlib/
A Dadi.h122 ADIBaseValid(uint32_t ui32Base) in ADIBaseValid() argument
124 return(ui32Base == ADI2_BASE || ui32Base == ADI3_BASE || in ADIBaseValid()
166 ASSERT(ADIBaseValid(ui32Base)); in ADI8RegWrite()
172 if (ui32Base==AUX_ADI4_BASE) { in ADI8RegWrite()
216 ASSERT(ADIBaseValid(ui32Base)); in ADI16RegWrite()
222 if (ui32Base==AUX_ADI4_BASE) { in ADI16RegWrite()
271 if (ui32Base==AUX_ADI4_BASE) { in ADI32RegWrite()
311 if (ui32Base==AUX_ADI4_BASE) { in ADI8RegRead()
354 if (ui32Base==AUX_ADI4_BASE) { in ADI16RegRead()
395 if (ui32Base==AUX_ADI4_BASE) { in ADI32RegRead()
[all …]
A Duart.h209 UARTBaseValid(uint32_t ui32Base) in UARTBaseValid() argument
211 return(ui32Base == UART0_BASE); in UARTBaseValid()
241 ASSERT(UARTBaseValid(ui32Base)); in UARTParityModeSet()
251 HWREG(ui32Base + UART_O_LCRH) = ((HWREG(ui32Base + UART_O_LCRH) & in UARTParityModeSet()
440 UARTEnable(uint32_t ui32Base) in UARTEnable() argument
485 UARTFIFOEnable(uint32_t ui32Base) in UARTFIFOEnable() argument
510 UARTFIFODisable(uint32_t ui32Base) in UARTFIFODisable() argument
538 UARTCharsAvail(uint32_t ui32Base) in UARTCharsAvail() argument
566 UARTSpaceAvail(uint32_t ui32Base) in UARTSpaceAvail() argument
668 UARTBusy(uint32_t ui32Base) in UARTBusy() argument
[all …]
A Dtimer.h211 TimerBaseValid(uint32_t ui32Base) in TimerBaseValid() argument
213 return((ui32Base == GPT0_BASE) || (ui32Base == GPT1_BASE) || in TimerBaseValid()
214 (ui32Base == GPT2_BASE) || (ui32Base == GPT3_BASE)); in TimerBaseValid()
240 ASSERT(TimerBaseValid(ui32Base)); in TimerEnable()
271 ASSERT(TimerBaseValid(ui32Base)); in TimerDisable()
383 ASSERT(TimerBaseValid(ui32Base)); in TimerEventControl()
391 HWREG(ui32Base + GPT_O_CTL) = ((HWREG(ui32Base + GPT_O_CTL) & ~ui32Timer) | in TimerEventControl()
485 ASSERT(TimerBaseValid(ui32Base)); in TimerPrescaleSet()
540 ASSERT(TimerBaseValid(ui32Base)); in TimerPrescaleGet()
579 ASSERT(TimerBaseValid(ui32Base)); in TimerPrescaleMatchSet()
[all …]
A Dudma.h343 uDMABaseValid(uint32_t ui32Base) in uDMABaseValid() argument
345 return(ui32Base == UDMA0_BASE); in uDMABaseValid()
362 uDMAEnable(uint32_t ui32Base) in uDMAEnable() argument
367 ASSERT(uDMABaseValid(ui32Base)); in uDMAEnable()
388 uDMADisable(uint32_t ui32Base) in uDMADisable() argument
393 ASSERT(uDMABaseValid(ui32Base)); in uDMADisable()
420 ASSERT(uDMABaseValid(ui32Base)); in uDMAErrorStatusGet()
446 ASSERT(uDMABaseValid(ui32Base)); in uDMAErrorStatusClear()
478 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelEnable()
1081 uDMAIntStatus(uint32_t ui32Base) in uDMAIntStatus() argument
[all …]
A Dssi.h162 SSIBaseValid(uint32_t ui32Base) in SSIBaseValid() argument
164 return(ui32Base == SSI0_BASE || ui32Base == SSI1_BASE); in SSIBaseValid()
242 SSIEnable(uint32_t ui32Base) in SSIEnable() argument
247 ASSERT(SSIBaseValid(ui32Base)); in SSIEnable()
267 SSIDisable(uint32_t ui32Base) in SSIDisable() argument
272 ASSERT(SSIBaseValid(ui32Base)); in SSIDisable()
385 SSIBusy(uint32_t ui32Base) in SSIBusy() argument
390 ASSERT(SSIBaseValid(ui32Base)); in SSIBusy()
416 SSIStatus(uint32_t ui32Base) in SSIStatus() argument
421 ASSERT(SSIBaseValid(ui32Base)); in SSIStatus()
[all …]
A Duart.c84 ASSERT(UARTBaseValid(ui32Base)); in UARTFIFOLevelGet()
112 ASSERT(UARTBaseValid(ui32Base)); in UARTConfigSetExpClk()
118 UARTDisable(ui32Base); in UARTConfigSetExpClk()
151 ASSERT(UARTBaseValid(ui32Base)); in UARTConfigGetExpClk()
174 UARTDisable(uint32_t ui32Base) in UARTDisable() argument
180 ASSERT(UARTBaseValid(ui32Base)); in UARTDisable()
212 ASSERT(UARTBaseValid(ui32Base)); in UARTCharGetNonBlocking()
239 UARTCharGet(uint32_t ui32Base) in UARTCharGet() argument
244 ASSERT(UARTBaseValid(ui32Base)); in UARTCharGet()
270 ASSERT(UARTBaseValid(ui32Base)); in UARTCharPutNonBlocking()
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A Di2c.h170 I2CBaseValid(uint32_t ui32Base) in I2CBaseValid() argument
172 return(ui32Base == I2C0_BASE); in I2CBaseValid()
229 ASSERT(I2CBaseValid(ui32Base)); in I2CMasterControl()
279 ASSERT(I2CBaseValid(ui32Base)); in I2CMasterSlaveAddrSet()
300 I2CMasterEnable(uint32_t ui32Base) in I2CMasterEnable() argument
303 ASSERT(I2CBaseValid(ui32Base)); in I2CMasterEnable()
324 I2CMasterDisable(uint32_t ui32Base) in I2CMasterDisable() argument
351 I2CMasterBusy(uint32_t ui32Base) in I2CMasterBusy() argument
621 I2CSlaveEnable(uint32_t ui32Base) in I2CSlaveEnable() argument
709 I2CSlaveDisable(uint32_t ui32Base) in I2CSlaveDisable() argument
[all …]
A Dtimer.c79 TimerIntNumberGet(uint32_t ui32Base) in TimerIntNumberGet() argument
87 switch(ui32Base) in TimerIntNumberGet()
122 ASSERT(TimerBaseValid(ui32Base)); in TimerConfigure()
163 HWREG(ui32Base + GPT_O_TBMR) = in TimerConfigure()
178 ASSERT(TimerBaseValid(ui32Base)); in TimerLevelControl()
203 ASSERT(TimerBaseValid(ui32Base)); in TimerStallControl()
227 ASSERT(TimerBaseValid(ui32Base)); in TimerWaitOnTriggerControl()
275 ASSERT(TimerBaseValid(ui32Base)); in TimerIntRegister()
330 ASSERT(TimerBaseValid(ui32Base)); in TimerIntUnregister()
381 ASSERT(TimerBaseValid(ui32Base)); in TimerMatchUpdateMode()
[all …]
A Daux_tdc.h241 AUXTDCBaseValid(uint32_t ui32Base) in AUXTDCBaseValid() argument
243 return(ui32Base == AUX_TDC_BASE); in AUXTDCBaseValid()
271 AUXTDCStatusGet(uint32_t ui32Base) in AUXTDCStatusGet() argument
276 ASSERT(AUXTDCBaseValid(ui32Base)); in AUXTDCStatusGet()
399 AUXTDCIdle(uint32_t ui32Base) in AUXTDCIdle() argument
404 ASSERT(AUXTDCBaseValid(ui32Base)); in AUXTDCIdle()
448 ASSERT(AUXTDCBaseValid(ui32Base)); in AUXTDCEnable()
475 AUXTDCIdleForce(uint32_t ui32Base) in AUXTDCIdleForce() argument
480 ASSERT(AUXTDCBaseValid(ui32Base)); in AUXTDCIdleForce()
609 AUXTDCLimitGet(uint32_t ui32Base) in AUXTDCLimitGet() argument
[all …]
A Dssi.c83 ASSERT(SSIBaseValid(ui32Base)); in SSIConfigSetExpClk()
103 HWREG(ui32Base + SSI_O_CR1) = ui32RegVal; in SSIConfigSetExpClk()
138 ASSERT(SSIBaseValid(ui32Base)); in SSIDataPutNonBlocking()
168 ASSERT(SSIBaseValid(ui32Base)); in SSIDataPut()
182 HWREG(ui32Base + SSI_O_DR) = ui32Data; in SSIDataPut()
196 ASSERT(SSIBaseValid(ui32Base)); in SSIDataGet()
208 *pui32Data = HWREG(ui32Base + SSI_O_DR); in SSIDataGet()
239 ASSERT(SSIBaseValid(ui32Base)); in SSIDataGetNonBlocking()
283 ASSERT(SSIBaseValid(ui32Base)); in SSIIntRegister()
318 SSIIntUnregister(uint32_t ui32Base) in SSIIntUnregister() argument
[all …]
A Dudma.c78 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelAttributeEnable()
129 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelAttributeDisable()
181 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelAttributeGet()
236 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelControlSet()
238 ASSERT(HWREG(ui32Base + UDMA_O_CTRL) != 0); in uDMAChannelControlSet()
277 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelTransferSet()
279 ASSERT(HWREG(ui32Base + UDMA_O_CTRL) != 0); in uDMAChannelTransferSet()
401 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelScatterGatherSet()
403 ASSERT(HWREG(ui32Base + UDMA_O_CTRL) != 0); in uDMAChannelScatterGatherSet()
470 ASSERT(uDMABaseValid(ui32Base)); in uDMAChannelSizeGet()
[all …]
A Di2s.h248 I2SBaseValid(uint32_t ui32Base) in I2SBaseValid() argument
250 return(ui32Base == I2S0_BASE); in I2SBaseValid()
292 I2SDisable(uint32_t ui32Base) in I2SDisable() argument
297 ASSERT(I2SBaseValid(ui32Base)); in I2SDisable()
421 ASSERT(I2SBaseValid(ui32Base)); in I2SClockConfigure()
533 ASSERT(I2SBaseValid(ui32Base)); in I2SIntRegister()
564 I2SIntUnregister(uint32_t ui32Base) in I2SIntUnregister() argument
569 ASSERT(I2SBaseValid(ui32Base)); in I2SIntUnregister()
610 ASSERT(I2SBaseValid(ui32Base)); in I2SIntEnable()
646 ASSERT(I2SBaseValid(ui32Base)); in I2SIntDisable()
[all …]
A Dddi.h206 DDIBaseValid(uint32_t ui32Base) in DDIBaseValid() argument
208 return(ui32Base == AUX_DDI0_OSC_BASE); in DDIBaseValid()
235 DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, in DDI32RegWrite() argument
241 ASSERT(DDIBaseValid(ui32Base)); in DDI32RegWrite()
267 DDI32RegRead(uint32_t ui32Base, uint32_t ui32Reg) in DDI32RegRead() argument
272 ASSERT(DDIBaseValid(ui32Base)); in DDI32RegRead()
311 ASSERT(DDIBaseValid(ui32Base)); in DDI32BitsSet()
344 DDI32BitsClear(uint32_t ui32Base, uint32_t ui32Reg, in DDI32BitsClear() argument
352 ASSERT(DDIBaseValid(ui32Base)); in DDI32BitsClear()
403 ASSERT(DDIBaseValid(ui32Base)); in DDI8SetValBit()
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A Dvims.c71 ASSERT(VIMSBaseValid(ui32Base)); in VIMSConfigure()
73 ui32Reg = HWREG(ui32Base + VIMS_O_CTL); in VIMSConfigure()
87 HWREG(ui32Base + VIMS_O_CTL) = ui32Reg; in VIMSConfigure()
103 ASSERT(VIMSBaseValid(ui32Base)); in VIMSModeSet()
112 ui32Reg = HWREG(ui32Base + VIMS_O_CTL); in VIMSModeSet()
116 HWREG(ui32Base + VIMS_O_CTL) = ui32Reg; in VIMSModeSet()
125 VIMSModeGet(uint32_t ui32Base) in VIMSModeGet() argument
132 ASSERT(VIMSBaseValid(ui32Base)); in VIMSModeGet()
134 ui32Reg = HWREG(ui32Base + VIMS_O_STAT); in VIMSModeGet()
160 ASSERT(VIMSBaseValid(ui32Base)); in VIMSModeSafeSet()
[all …]
A Drom.h310 ((uint32_t (*)(uint32_t ui32Base)) \
404 ((uint32_t (*)(uint32_t ui32Base)) \
594 ((void (*)(uint32_t ui32Base, uint32_t ui32Data)) \
602 ((void (*)(uint32_t ui32Base, uint32_t *pui32Data)) \
612 ((void (*)(uint32_t ui32Base, uint32_t ui32Config)) \
648 ((void (*)(uint32_t ui32Base)) \
652 ((int32_t (*)(uint32_t ui32Base)) \
656 ((int32_t (*)(uint32_t ui32Base)) \
660 ((bool (*)(uint32_t ui32Base, uint8_t ui8Data)) \
664 ((void (*)(uint32_t ui32Base, uint8_t ui8Data)) \
[all …]
A Dvims.h121 VIMSBaseValid(uint32_t ui32Base) in VIMSBaseValid() argument
123 return(ui32Base == VIMS_BASE); in VIMSBaseValid()
150 extern void VIMSConfigure(uint32_t ui32Base, bool bRoundRobin,
207 extern void VIMSModeSet(uint32_t ui32Base, uint32_t ui32Mode);
226 extern uint32_t VIMSModeGet(uint32_t ui32Base);
280 extern void VIMSModeSafeSet( uint32_t ui32Base ,
299 VIMSLineBufDisable(uint32_t ui32Base) in VIMSLineBufDisable() argument
304 HWREG(ui32Base + VIMS_O_CTL) |= VIMS_CTL_IDCODE_LB_DIS_M | in VIMSLineBufDisable()
323 VIMSLineBufEnable(uint32_t ui32Base) in VIMSLineBufEnable() argument
328 HWREG(ui32Base + VIMS_O_CTL) &= ~(VIMS_CTL_IDCODE_LB_DIS_M | in VIMSLineBufEnable()
A Dddi.c64 DDI16BitWrite(uint32_t ui32Base, uint32_t ui32Reg, in DDI16BitWrite() argument
73 ASSERT(DDIBaseValid(ui32Base)); in DDI16BitWrite()
80 ui32RegAddr = ui32Base + (ui32Reg << 1) + DDI_O_MASK16B; in DDI16BitWrite()
108 DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg, in DDI16BitfieldWrite() argument
118 ASSERT(DDIBaseValid(ui32Base)); in DDI16BitfieldWrite()
123 ui32RegAddr = ui32Base + (ui32Reg << 1) + DDI_O_MASK16B; in DDI16BitfieldWrite()
160 ASSERT(DDIBaseValid(ui32Base)); in DDI16BitRead()
165 ui32RegAddr = ui32Base + ui32Reg + DDI_O_DIR; in DDI16BitRead()
198 DDI16BitfieldRead(uint32_t ui32Base, uint32_t ui32Reg, in DDI16BitfieldRead() argument
207 ASSERT(DDIBaseValid(ui32Base)); in DDI16BitfieldRead()
[all …]
A Daux_tdc.c60 AUXTDCConfigSet(uint32_t ui32Base, uint32_t ui32StartCondition, in AUXTDCConfigSet() argument
66 ASSERT(AUXTDCBaseValid(ui32Base)); in AUXTDCConfigSet()
72 while(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) == in AUXTDCConfigSet()
80 HWREG(ui32Base + AUX_TDC_O_CTL) = 0x0; in AUXTDCConfigSet()
85 HWREG(ui32Base + AUX_TDC_O_TRIGSRC) = ui32StartCondition | ui32StopCondition; in AUXTDCConfigSet()
94 AUXTDCMeasurementDone(uint32_t ui32Base) in AUXTDCMeasurementDone() argument
102 ASSERT(AUXTDCBaseValid(ui32Base)); in AUXTDCMeasurementDone()
107 ui32Reg = HWREG(ui32Base + AUX_TDC_O_STAT); in AUXTDCMeasurementDone()
A Di2s.c79 I2SEnable(uint32_t ui32Base) in I2SEnable() argument
84 ASSERT(I2SBaseValid(ui32Base)); in I2SEnable()
120 ASSERT(I2SBaseValid(ui32Base)); in I2SAudioFormatConfigure()
150 ASSERT(I2SBaseValid(ui32Base)); in I2SChannelConfigure()
279 I2SBufferConfig(uint32_t ui32Base, uint32_t ui32InBufBase, in I2SBufferConfig() argument
286 ASSERT(I2SBaseValid(ui32Base)); in I2SBufferConfig()
309 ASSERT(I2SBaseValid(ui32Base)); in I2SPointerSet()
330 I2SPointerUpdate(uint32_t ui32Base, bool bInput) in I2SPointerUpdate() argument
337 ASSERT(I2SBaseValid(ui32Base)); in I2SPointerUpdate()
380 ASSERT(I2SBaseValid(ui32Base)); in I2SSampleStampConfigure()
[all …]
A Di2c.c64 I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32I2CClk, in I2CMasterInitExpClk() argument
73 ASSERT(I2CBaseValid(ui32Base)); in I2CMasterInitExpClk()
108 I2CMasterErr(uint32_t ui32Base) in I2CMasterErr() argument
115 ASSERT(I2CBaseValid(ui32Base)); in I2CMasterErr()
150 I2CIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)) in I2CIntRegister() argument
157 ASSERT(I2CBaseValid(ui32Base)); in I2CIntRegister()
181 I2CIntUnregister(uint32_t ui32Base) in I2CIntUnregister() argument
188 ASSERT(I2CBaseValid(ui32Base)); in I2CIntUnregister()
A Dioc.c551 IOCPinTypeUart(uint32_t ui32Base, uint32_t ui32Rx, uint32_t ui32Tx, in IOCPinTypeUart() argument
557 ASSERT(ui32Base == UART0_BASE); in IOCPinTypeUart()
590 IOCPinTypeSsiMaster(uint32_t ui32Base, uint32_t ui32Rx, in IOCPinTypeSsiMaster() argument
597 ASSERT((ui32Base == SSI0_BASE) || (ui32Base == SSI1_BASE)); in IOCPinTypeSsiMaster()
606 if(ui32Base == SSI0_BASE) in IOCPinTypeSsiMaster()
652 IOCPinTypeSsiSlave(uint32_t ui32Base, uint32_t ui32Rx, in IOCPinTypeSsiSlave() argument
659 ASSERT((ui32Base == SSI0_BASE) || (ui32Base == SSI1_BASE)); in IOCPinTypeSsiSlave()
668 if(ui32Base == SSI0_BASE) in IOCPinTypeSsiSlave()
714 IOCPinTypeI2c(uint32_t ui32Base, uint32_t ui32Data, uint32_t ui32Clk) in IOCPinTypeI2c() argument
A Dioc.h942 extern void IOCPinTypeUart(uint32_t ui32Base, uint32_t ui32Rx,
975 extern void IOCPinTypeSsiMaster(uint32_t ui32Base, uint32_t ui32Rx,
1004 extern void IOCPinTypeSsiSlave(uint32_t ui32Base, uint32_t ui32Rx,
1027 extern void IOCPinTypeI2c(uint32_t ui32Base, uint32_t ui32Data,

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