1LOCAL_DIR := $(GET_LOCAL_DIR) 2 3MODULE := $(LOCAL_DIR) 4 5# can override this in local.mk 6ENABLE_THUMB?=true 7 8# default to the regular arm subarch 9SUBARCH := arm 10 11GLOBAL_DEFINES += \ 12 ARM_CPU_$(ARM_CPU)=1 13 14# do set some options based on the cpu core 15HANDLED_CORE := false 16ifeq ($(ARM_CPU),cortex-m0) 17GLOBAL_DEFINES += \ 18 ARM_CPU_CORTEX_M0=1 \ 19 ARM_ISA_ARMV6M=1 \ 20 ARM_WITH_THUMB=1 \ 21 USE_BUILTIN_ATOMICS=0 22HANDLED_CORE := true 23ENABLE_THUMB := true 24SUBARCH := arm-m 25endif 26ifeq ($(ARM_CPU),cortex-m0plus) 27GLOBAL_DEFINES += \ 28 ARM_CPU_CORTEX_M0_PLUS=1 \ 29 ARM_ISA_ARMV6M=1 \ 30 ARM_WITH_THUMB=1 \ 31 USE_BUILTIN_ATOMICS=0 32HANDLED_CORE := true 33ENABLE_THUMB := true 34SUBARCH := arm-m 35endif 36ifeq ($(ARM_CPU),cortex-m3) 37GLOBAL_DEFINES += \ 38 ARM_CPU_CORTEX_M3=1 \ 39 ARM_ISA_ARMv7=1 \ 40 ARM_ISA_ARMv7M=1 \ 41 ARM_WITH_THUMB=1 \ 42 ARM_WITH_THUMB2=1 43HANDLED_CORE := true 44ENABLE_THUMB := true 45SUBARCH := arm-m 46endif 47ifeq ($(ARM_CPU),cortex-m4) 48GLOBAL_DEFINES += \ 49 ARM_CPU_CORTEX_M4=1 \ 50 ARM_ISA_ARMv7=1 \ 51 ARM_ISA_ARMv7M=1 \ 52 ARM_WITH_THUMB=1 \ 53 ARM_WITH_THUMB2=1 54HANDLED_CORE := true 55ENABLE_THUMB := true 56SUBARCH := arm-m 57endif 58ifeq ($(ARM_CPU),cortex-m4f) 59GLOBAL_DEFINES += \ 60 ARM_CPU_CORTEX_M4=1 \ 61 ARM_CPU_CORTEX_M4F=1 \ 62 ARM_ISA_ARMv7=1 \ 63 ARM_ISA_ARMv7M=1 \ 64 ARM_WITH_THUMB=1 \ 65 ARM_WITH_THUMB2=1 \ 66 ARM_WITH_VFP=1 \ 67 ARM_WITH_VFP_SP_ONLY=1 68HANDLED_CORE := true 69ENABLE_THUMB := true 70SUBARCH := arm-m 71endif 72ifeq ($(ARM_CPU),cortex-m55) 73GLOBAL_DEFINES += \ 74 ARM_CPU_CORTEX_M55=1 \ 75 ARM_ISA_ARMv7=1 \ 76 ARM_ISA_ARMv7M=1 \ 77 ARM_WITH_THUMB=1 \ 78 ARM_WITH_THUMB2=1 \ 79 ARM_WITH_CACHE=1 80HANDLED_CORE := true 81ENABLE_THUMB := true 82SUBARCH := arm-m 83endif 84ifeq ($(ARM_CPU),cortex-m7) 85GLOBAL_DEFINES += \ 86 ARM_CPU_CORTEX_M7=1 \ 87 ARM_ISA_ARMv7=1 \ 88 ARM_ISA_ARMv7M=1 \ 89 ARM_WITH_THUMB=1 \ 90 ARM_WITH_THUMB2=1 \ 91 ARM_WITH_CACHE=1 92HANDLED_CORE := true 93ENABLE_THUMB := true 94SUBARCH := arm-m 95endif 96ifeq ($(ARM_CPU),cortex-m7-fpu-sp-d16) 97GLOBAL_DEFINES += \ 98 ARM_CPU_CORTEX_M7=1 \ 99 ARM_ISA_ARMv7=1 \ 100 ARM_ISA_ARMv7M=1 \ 101 ARM_WITH_THUMB=1 \ 102 ARM_WITH_THUMB2=1 \ 103 ARM_WITH_CACHE=1 \ 104 ARM_WITH_VFP=1 \ 105 ARM_WITH_VFP_SP_ONLY=1 106HANDLED_CORE := true 107ENABLE_THUMB := true 108SUBARCH := arm-m 109endif 110ifeq ($(ARM_CPU),cortex-a7) 111GLOBAL_DEFINES += \ 112 ARM_WITH_CP15=1 \ 113 ARCH_HAS_MMU=1 \ 114 ARM_ISA_ARMv7=1 \ 115 ARM_ISA_ARMv7A=1 \ 116 ARM_WITH_VFP=1 \ 117 ARM_WITH_NEON=1 \ 118 ARM_WITH_THUMB=1 \ 119 ARM_WITH_THUMB2=1 \ 120 ARM_WITH_CACHE=1 \ 121 ARM_WITH_HYP=1 122HANDLED_CORE := true 123endif 124ifeq ($(ARM_CPU),cortex-a15) 125GLOBAL_DEFINES += \ 126 ARM_WITH_CP15=1 \ 127 ARCH_HAS_MMU=1 \ 128 ARM_ISA_ARMv7=1 \ 129 ARM_ISA_ARMv7A=1 \ 130 ARM_WITH_THUMB=1 \ 131 ARM_WITH_THUMB2=1 \ 132 ARM_WITH_CACHE=1 \ 133 ARM_WITH_L2=1 134ifneq ($(ARM_WITHOUT_VFP_NEON),true) 135GLOBAL_DEFINES += \ 136 ARM_WITH_VFP=1 \ 137 ARM_WITH_NEON=1 138endif 139HANDLED_CORE := true 140endif 141ifeq ($(ARM_CPU),cortex-a8) 142GLOBAL_DEFINES += \ 143 ARM_WITH_CP15=1 \ 144 ARCH_HAS_MMU=1 \ 145 ARM_ISA_ARMv7=1 \ 146 ARM_ISA_ARMv7A=1 \ 147 ARM_WITH_VFP=1 \ 148 ARM_WITH_NEON=1 \ 149 ARM_WITH_THUMB=1 \ 150 ARM_WITH_THUMB2=1 \ 151 ARM_WITH_CACHE=1 \ 152 ARM_WITH_L2=1 153HANDLED_CORE := true 154endif 155ifeq ($(ARM_CPU),cortex-a9) 156GLOBAL_DEFINES += \ 157 ARM_WITH_CP15=1 \ 158 ARCH_HAS_MMU=1 \ 159 ARM_ISA_ARMv7=1 \ 160 ARM_ISA_ARMv7A=1 \ 161 ARM_WITH_THUMB=1 \ 162 ARM_WITH_THUMB2=1 \ 163 ARM_WITH_CACHE=1 164HANDLED_CORE := true 165endif 166ifeq ($(ARM_CPU),cortex-a9-neon) 167GLOBAL_DEFINES += \ 168 ARM_CPU_CORTEX_A9=1 \ 169 ARM_WITH_CP15=1 \ 170 ARCH_HAS_MMU=1 \ 171 ARM_ISA_ARMv7=1 \ 172 ARM_ISA_ARMv7A=1 \ 173 ARM_WITH_VFP=1 \ 174 ARM_WITH_NEON=1 \ 175 ARM_WITH_THUMB=1 \ 176 ARM_WITH_THUMB2=1 \ 177 ARM_WITH_CACHE=1 178HANDLED_CORE := true 179endif 180ifeq ($(ARM_CPU),arm1136j-s) 181GLOBAL_DEFINES += \ 182 ARM_WITH_CP15=1 \ 183 ARCH_HAS_MMU=1 \ 184 ARM_ISA_ARMv6=1 \ 185 ARM_WITH_THUMB=1 \ 186 ARM_WITH_CACHE=1 \ 187 ARM_CPU_ARM1136=1 188HANDLED_CORE := true 189endif 190ifeq ($(ARM_CPU),arm1176jzf-s) 191GLOBAL_DEFINES += \ 192 ARM_WITH_CP15=1 \ 193 ARCH_HAS_MMU=1 \ 194 ARM_ISA_ARMv6=1 \ 195 ARM_WITH_VFP=1 \ 196 ARM_WITH_THUMB=1 \ 197 ARM_WITH_CACHE=1 \ 198 ARM_CPU_ARM1136=1 199HANDLED_CORE := true 200endif 201ifeq ($(ARM_CPU),cortex-r4f) 202GLOBAL_DEFINES += \ 203 ARM_CPU_CORTEX_R4F=1 \ 204 ARM_ISA_ARMv7=1 \ 205 ARM_WITH_VFP=1 \ 206 ARM_WITH_THUMB=1 207 ENABLE_THUMB := true 208 HANDLED_CORE := true 209endif 210ifeq ($(ARM_CPU),armemu) 211# flavor of emulated cpu by the armemu project 212GLOBAL_DEFINES += \ 213 ARM_WITH_CP15=1 \ 214 ARM_ISA_ARMv7=1 \ 215 ARM_ISA_ARMv7A=1 \ 216 ARM_WITH_CACHE=1 217HANDLED_CORE := true 218ENABLE_THUMB := false # armemu doesn't currently support thumb properly 219endif 220 221ifneq ($(HANDLED_CORE),true) 222$(error $(LOCAL_DIR)/rules.mk doesnt have logic for arm core $(ARM_CPU)) 223endif 224 225THUMBCFLAGS := 226THUMBINTERWORK := 227ifeq ($(ENABLE_THUMB),true) 228THUMBCFLAGS := -mthumb -D__thumb__ 229ifneq ($(SUBARCH),arm-m) 230# Only enable thumb interworking switch if we're compiling in a mixed 231# arm/thumb environment. Also possible this switch is not needed anymore. 232THUMBINTERWORK := -mthumb-interwork 233endif 234endif 235 236GLOBAL_INCLUDES += \ 237 $(LOCAL_DIR)/$(SUBARCH)/include 238 239ifeq ($(SUBARCH),arm) 240MODULE_SRCS += \ 241 $(LOCAL_DIR)/arm/start.S \ 242 $(LOCAL_DIR)/arm/asm.S \ 243 $(LOCAL_DIR)/arm/cache-ops.S \ 244 $(LOCAL_DIR)/arm/cache.c \ 245 $(LOCAL_DIR)/arm/debug.c \ 246 $(LOCAL_DIR)/arm/ops.S \ 247 $(LOCAL_DIR)/arm/faults.c \ 248 $(LOCAL_DIR)/arm/mmu.c \ 249 $(LOCAL_DIR)/arm/thread.c 250 251MODULE_FLOAT_SRCS += \ 252 $(LOCAL_DIR)/arm/exceptions.S \ 253 $(LOCAL_DIR)/arm/fpu.c \ 254 255MODULE_ARM_OVERRIDE_SRCS := \ 256 $(LOCAL_DIR)/arm/arch.c 257 258GLOBAL_DEFINES += \ 259 ARCH_DEFAULT_STACK_SIZE=4096 260 261ARCH_OPTFLAGS := -O2 262WITH_LINKER_GC ?= 1 263 264# use the numeric registers when disassembling code 265ARCH_OBJDUMP_FLAGS := -Mreg-names-raw 266 267# we have a mmu and want the vmm/pmm 268WITH_KERNEL_VM ?= 1 269 270# for arm, have the kernel occupy the entire top 3GB of virtual space, 271# but put the kernel itself at 0x80000000. 272# this leaves 0x40000000 - 0x80000000 open for kernel space to use. 273GLOBAL_DEFINES += \ 274 KERNEL_ASPACE_BASE=0x40000000 \ 275 KERNEL_ASPACE_SIZE=0xc0000000 276 277KERNEL_BASE ?= 0x80000000 278KERNEL_LOAD_OFFSET ?= 0 279 280GLOBAL_DEFINES += \ 281 KERNEL_BASE=$(KERNEL_BASE) \ 282 KERNEL_LOAD_OFFSET=$(KERNEL_LOAD_OFFSET) 283 284# if its requested we build with SMP, arm generically supports 4 cpus 285ifeq ($(WITH_SMP),1) 286SMP_MAX_CPUS ?= 4 287SMP_CPU_CLUSTER_SHIFT ?= 8 288SMP_CPU_ID_BITS ?= 24 289 290GLOBAL_DEFINES += \ 291 WITH_SMP=1 \ 292 SMP_MAX_CPUS=$(SMP_MAX_CPUS) \ 293 SMP_CPU_CLUSTER_SHIFT=$(SMP_CPU_CLUSTER_SHIFT) \ 294 SMP_CPU_ID_BITS=$(SMP_CPU_ID_BITS) 295 296MODULE_SRCS += \ 297 $(LOCAL_DIR)/arm/mp.c 298else 299GLOBAL_DEFINES += \ 300 SMP_MAX_CPUS=1 301endif 302 303ifeq (true,$(call TOBOOL,$(WITH_NS_MAPPING))) 304GLOBAL_DEFINES += \ 305 WITH_ARCH_MMU_PICK_SPOT=1 306endif 307 308endif 309ifeq ($(SUBARCH),arm-m) 310MODULE_SRCS += \ 311 $(LOCAL_DIR)/arm-m/arch.c \ 312 $(LOCAL_DIR)/arm-m/cache.c \ 313 $(LOCAL_DIR)/arm-m/exceptions.c \ 314 $(LOCAL_DIR)/arm-m/spin_cycles.c \ 315 $(LOCAL_DIR)/arm-m/start.c \ 316 $(LOCAL_DIR)/arm-m/thread.c \ 317 $(LOCAL_DIR)/arm-m/vectab.c 318 319# we're building for small binaries 320GLOBAL_DEFINES += \ 321 ARM_ONLY_THUMB=1 \ 322 ARCH_DEFAULT_STACK_SIZE=1024 \ 323 SMP_MAX_CPUS=1 324 325MODULE_DEPS += \ 326 arch/arm/arm-m/CMSIS 327 328ARCH_OPTFLAGS := -Os 329WITH_LINKER_GC ?= 1 330endif 331 332# try to find toolchain 333include $(LOCAL_DIR)/toolchain.mk 334TOOLCHAIN_PREFIX := $(ARCH_$(ARCH)_TOOLCHAIN_PREFIX) 335 336ARCH_COMPILEFLAGS += $(ARCH_$(ARCH)_COMPILEFLAGS) 337ARCH_COMPILEFLAGS_NOFLOAT := 338ARCH_COMPILEFLAGS_FLOAT := $(ARCH_$(ARCH)_COMPILEFLAGS_FLOAT) 339 340GLOBAL_COMPILEFLAGS += $(THUMBINTERWORK) 341 342# set the max page size to something more reasonable (defaults to 64K or above) 343ARCH_LDFLAGS += -z max-page-size=4096 344 345# find the direct path to libgcc.a for our particular multilib variant 346LIBGCC := $(shell $(TOOLCHAIN_PREFIX)gcc $(GLOBAL_COMPILEFLAGS) $(ARCH_COMPILEFLAGS) $(THUMBCFLAGS) -print-libgcc-file-name) 347#$(info LIBGCC = $(LIBGCC)) 348#$(info LIBGCC COMPILEFLAGS = $(GLOBAL_COMPILEFLAGS) $(ARCH_COMPILEFLAGS) $(THUMBCFLAGS)) 349 350# make sure some bits were set up 351MEMVARS_SET := 0 352ifneq ($(MEMBASE),) 353MEMVARS_SET := 1 354endif 355ifneq ($(MEMSIZE),) 356MEMVARS_SET := 1 357endif 358ifeq ($(MEMVARS_SET),0) 359$(error missing MEMBASE or MEMSIZE variable, please set in target rules.mk) 360endif 361 362GLOBAL_DEFINES += \ 363 MEMBASE=$(MEMBASE) \ 364 MEMSIZE=$(MEMSIZE) 365 366# potentially generated files that should be cleaned out with clean make rule 367GENERATED += \ 368 $(BUILDDIR)/system-onesegment.ld \ 369 $(BUILDDIR)/system-twosegment.ld 370 371# rules for generating the linker scripts 372$(BUILDDIR)/system-onesegment.ld: $(LOCAL_DIR)/system-onesegment.ld $(wildcard arch/*.ld) linkerscript.phony 373 @echo generating $@ 374 @$(MKDIR) 375 $(NOECHO)sed "s/%MEMBASE%/$(MEMBASE)/;s/%MEMSIZE%/$(MEMSIZE)/;s/%KERNEL_BASE%/$(KERNEL_BASE)/;s/%KERNEL_LOAD_OFFSET%/$(KERNEL_LOAD_OFFSET)/" < $< > $@.tmp 376 @$(call TESTANDREPLACEFILE,$@.tmp,$@) 377 378$(BUILDDIR)/system-twosegment.ld: $(LOCAL_DIR)/system-twosegment.ld $(wildcard arch/*.ld) linkerscript.phony 379 @echo generating $@ 380 @$(MKDIR) 381 $(NOECHO)sed "s/%ROMBASE%/$(ROMBASE)/;s/%MEMBASE%/$(MEMBASE)/;s/%MEMSIZE%/$(MEMSIZE)/" < $< > $@.tmp 382 @$(call TESTANDREPLACEFILE,$@.tmp,$@) 383 384linkerscript.phony: 385.PHONY: linkerscript.phony 386 387# arm specific script to try to guess stack usage 388$(OUTELF).stack: LOCAL_DIR:=$(LOCAL_DIR) 389$(OUTELF).stack: $(OUTELF) 390 $(NOECHO)echo generating stack usage $@ 391 $(NOECHO)$(OBJDUMP) $(ARCH_OBJDUMP_FLAGS) -d $< | $(LOCAL_DIR)/stackusage | $(CPPFILT) | sort -n -k 1 -r > $@ 392 393EXTRA_BUILDDEPS += $(OUTELF).stack 394GENERATED += $(OUTELF).stack 395 396include make/module.mk 397