1 /*
2 * Copyright (c) 2009 Corey Tabaka
3 * Copyright (c) 2015 Intel Corporation
4 *
5 * Use of this source code is governed by a MIT-style
6 * license that can be found in the LICENSE file or at
7 * https://opensource.org/licenses/MIT
8 */
9 #include <lk/debug.h>
10 #include <lk/trace.h>
11 #include <arch/x86.h>
12 #include <arch/fpu.h>
13 #include <kernel/thread.h>
14
15 /* exceptions */
16 #define INT_DIVIDE_0 0x00
17 #define INT_DEBUG_EX 0x01
18 #define INT_INVALID_OP 0x06
19 #define INT_DEV_NA_EX 0x07
20 #define INT_STACK_FAULT 0x0c
21 #define INT_GP_FAULT 0x0d
22 #define INT_PAGE_FAULT 0x0e
23 #define INT_MF 0x10
24 #define INT_XM 0x13
25
26 extern enum handler_return platform_irq(x86_iframe_t *frame);
27
dump_fault_frame(x86_iframe_t * frame)28 static void dump_fault_frame(x86_iframe_t *frame) {
29 dprintf(CRITICAL, "cpu %u:\n", arch_curr_cpu_num());
30 #if ARCH_X86_32
31 dprintf(CRITICAL, " CS: %04hx EIP: %08x EFL: %08x CR2: %08lx\n",
32 frame->cs, frame->ip, frame->flags, x86_get_cr2());
33 dprintf(CRITICAL, "EAX: %08x ECX: %08x EDX: %08x EBX: %08x\n",
34 frame->ax, frame->cx, frame->dx, frame->bx);
35 dprintf(CRITICAL, "ESP: %08x EBP: %08x ESI: %08x EDI: %08x\n",
36 frame->sp, frame->bp, frame->si, frame->di);
37 dprintf(CRITICAL, " DS: %04hx ES: %04hx FS: %04hx GS: %04hx\n",
38 frame->ds, frame->es, frame->fs, frame->gs);
39 #elif ARCH_X86_64
40 dprintf(CRITICAL, " CS: %4llx RIP: %16llx EFL: %16llx CR2: %16lx\n",
41 frame->cs, frame->ip, frame->flags, x86_get_cr2());
42 dprintf(CRITICAL, " RAX: %16llx RBX: %16llx RCX: %16llx RDX: %16llx\n",
43 frame->ax, frame->bx, frame->cx, frame->dx);
44 dprintf(CRITICAL, " RSI: %16llx RDI: %16llx RBP: %16llx RSP: %16llx\n",
45 frame->si, frame->di, frame->bp, frame->user_sp);
46 dprintf(CRITICAL, " R8: %16llx R9: %16llx R10: %16llx R11: %16llx\n",
47 frame->r8, frame->r9, frame->r10, frame->r11);
48 dprintf(CRITICAL, " R12: %16llx R13: %16llx R14: %16llx R15: %16llx\n",
49 frame->r12, frame->r13, frame->r14, frame->r15);
50 dprintf(CRITICAL, "errc: %16llx\n",
51 frame->err_code);
52 #endif
53
54 // dump the bottom of the current stack
55 addr_t stack = (addr_t) frame;
56
57 if (stack != 0) {
58 dprintf(CRITICAL, "bottom of stack at 0x%08x:\n", (unsigned int)stack);
59 hexdump((void *)stack, 512);
60 }
61 }
62
exception_die(x86_iframe_t * frame,const char * msg)63 static void exception_die(x86_iframe_t *frame, const char *msg) {
64 dprintf(CRITICAL, "%s", msg);
65 dump_fault_frame(frame);
66
67 for (;;) {
68 x86_cli();
69 x86_hlt();
70 }
71 }
72
x86_syscall_handler(x86_iframe_t * frame)73 static void x86_syscall_handler(x86_iframe_t *frame) {
74 exception_die(frame, "unhandled syscall, halting\n");
75 }
76
x86_gpf_handler(x86_iframe_t * frame)77 static void x86_gpf_handler(x86_iframe_t *frame) {
78 exception_die(frame, "unhandled gpf, halting\n");
79 }
80
x86_invop_handler(x86_iframe_t * frame)81 static void x86_invop_handler(x86_iframe_t *frame) {
82 exception_die(frame, "unhandled invalid op, halting\n");
83 }
84
x86_unhandled_exception(x86_iframe_t * frame)85 static void x86_unhandled_exception(x86_iframe_t *frame) {
86 printf("vector %u\n", (uint)frame->vector);
87 exception_die(frame, "unhandled exception, halting\n");
88 }
89
x86_pfe_handler(x86_iframe_t * frame)90 static void x86_pfe_handler(x86_iframe_t *frame) {
91 /* Handle a page fault exception */
92 uint32_t error_code;
93 thread_t *current_thread;
94 error_code = frame->err_code;
95
96 #ifdef PAGE_FAULT_DEBUG_INFO
97 addr_t v_addr, ssp, esp, ip, rip;
98 v_addr = x86_get_cr2();
99
100 ssp = frame->user_ss & X86_8BYTE_MASK;
101 esp = frame->user_sp;
102 ip = frame->cs & X86_8BYTE_MASK;
103 rip = frame->ip;
104
105 dprintf(CRITICAL, "<PAGE FAULT> Instruction Pointer = 0x%x:0x%x\n",
106 (unsigned int)ip,
107 (unsigned int)rip);
108 dprintf(CRITICAL, "<PAGE FAULT> Stack Pointer = 0x%x:0x%x\n",
109 (unsigned int)ssp,
110 (unsigned int)esp);
111 dprintf(CRITICAL, "<PAGE FAULT> Fault Linear Address = 0x%x\n",
112 (unsigned int)v_addr);
113 dprintf(CRITICAL, "<PAGE FAULT> Error Code Value = 0x%x\n",
114 error_code);
115 dprintf(CRITICAL, "<PAGE FAULT> Error Code Type = %s %s %s%s, %s\n",
116 error_code & PFEX_U ? "user" : "supervisor",
117 error_code & PFEX_W ? "write" : "read",
118 error_code & PFEX_I ? "instruction" : "data",
119 error_code & PFEX_RSV ? " rsv" : "",
120 error_code & PFEX_P ? "protection violation" : "page not present");
121 #endif
122
123 current_thread = get_current_thread();
124 dump_thread(current_thread);
125
126 if (error_code & PFEX_U) {
127 // User mode page fault
128 switch (error_code) {
129 case 4:
130 case 5:
131 case 6:
132 case 7:
133 #ifdef PAGE_FAULT_DEBUG_INFO
134 thread_detach(current_thread);
135 #else
136 thread_exit(current_thread->retcode);
137 #endif
138 break;
139 }
140 } else {
141 // Supervisor mode page fault
142 switch (error_code) {
143
144 case 0:
145 case 1:
146 case 2:
147 case 3:
148 exception_die(frame, "Page Fault exception, halting\n");
149 break;
150 }
151 }
152 }
153
154 /* top level x86 exception handler for most exceptions and irqs, called from asm */
155 void x86_exception_handler(x86_iframe_t *frame);
x86_exception_handler(x86_iframe_t * frame)156 void x86_exception_handler(x86_iframe_t *frame) {
157 // get the current vector
158 unsigned int vector = frame->vector;
159
160 THREAD_STATS_INC(interrupts);
161
162 // deliver the interrupt
163 enum handler_return ret = INT_NO_RESCHEDULE;
164
165 switch (vector) {
166 case INT_GP_FAULT:
167 x86_gpf_handler(frame);
168 break;
169
170 case INT_INVALID_OP:
171 x86_invop_handler(frame);
172 break;
173
174 case INT_PAGE_FAULT:
175 x86_pfe_handler(frame);
176 break;
177
178 case INT_DEV_NA_EX:
179 #if X86_WITH_FPU
180 fpu_dev_na_handler();
181 #endif
182 break;
183
184 case INT_MF: { /* x87 floating point math fault */
185 uint16_t fsw;
186 __asm__ __volatile__("fnstsw %0" : "=m" (fsw));
187 TRACEF("fsw 0x%hx\n", fsw);
188 exception_die(frame, "x87 math fault\n");
189 //asm volatile("fnclex");
190 break;
191 }
192 case INT_XM: { /* simd math fault */
193 uint32_t mxcsr;
194 __asm__ __volatile__("stmxcsr %0" : "=m" (mxcsr));
195 TRACEF("mxcsr 0x%x\n", mxcsr);
196 exception_die(frame, "simd math fault\n");
197 break;
198 }
199 case INT_DIVIDE_0:
200 case INT_DEBUG_EX:
201 case INT_STACK_FAULT:
202 case 3:
203 default:
204 x86_unhandled_exception(frame);
205 break;
206
207 /* pass the rest of the irq vectors to the platform */
208 case 0x20 ... 255:
209 ret = platform_irq(frame);
210 }
211
212 if (ret != INT_NO_RESCHEDULE)
213 thread_preempt();
214 }
215
216