1/*
2 * @brief I2CS bus slave example using interrupt mode
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2014
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products.  This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licensor disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights.  NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers.  This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32/** @defgroup EXAMPLES_PERIPH_15XX_I2CSINT LPC15xx I2CS bus slave example using interrupts
33 * @ingroup EXAMPLES_PERIPH_15XX
34 * <b>Example description</b><br>
35 * This example shows how to configure I2C as a bus slave in interrupt mode using
36 * the I2CS driver.<br>
37 *
38 * This example provides 2 simple (emulated) EEPROMs at different I2C slave
39 * addresses. Both are on the same I2C bus, but the slave controller will be
40 * configured to support 2 slave addresses on the single bus. The emulated
41 * EEPROMs have their memory locations set and read via I2C write and read
42 * operations. Operations can be as little as a byte or continuous until the
43 * master terminates the transfer. The following operations are supported:<br>
44 * - <START> <ADDR><W> Write 16-bit address <STOP><br>
45 * - <START> <ADDR><W> Write 16-bit address <REPEAT START><R> READ READ ... READ <STOP> (unbound read)<br>
46 * - <START> <ADDR><W> Write 16-bit address WRITE WRITE ... WRITE <STOP> (unbound write)<br>
47 * - <START> <ADDR><R> READ READ ... READ <STOP> (unbound read)<br>
48 * Note: Slave address is 0x28.<br>
49 *
50 * Unbound read oeprations have no limit on size and will go as long as the master
51 * requests or sends data. If the end of emulated EEPROM is reached, the EEPROM address
52 * will wrap. All reads and write operations auto-increment. Read operations without a
53 * 16-bit address will use the last incremented address.<br>
54 *
55 * The I2C slave processing is handled entirely in the I2C slave interrupt handler.
56 * This example doesn't use the Chip_I2CS_Xfer() function and implements the slave
57 * support inside the I2C interrupt handler in real-time.<br>
58 *
59 * The example also provides the master interface on the same I2C bus as the slave
60 * to communicate the the emulated EEPROMs without requiring an external I2C master.<br>
61 *
62 * <b>Special connection requirements</b><br>
63 * No special requirements are needed for this example.<br>
64 *
65 * <b>Build procedures:</b><br>
66 * Visit the <a href="http://www.lpcware.com/content/project/lpcopen-platform-nxp-lpc-microcontrollers/lpcopen-v200-quickstart-guides">LPCOpen quickstart guides</a>
67 * to get started building LPCOpen projects.
68 *
69 * <b>Supported boards and board setup:</b><br>
70 * @ref LPCOPEN_15XX_BOARD_LPCXPRESSO_1549<br>
71 *
72 * <b>Submitting LPCOpen issues:</b><br>
73 * @ref LPCOPEN_COMMUNITY
74 * @{
75 */
76
77/**
78 * @}
79 */
80