1 /*
2 * Copyright (c) 2015 - 2020, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this
9 * list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <nrfx.h>
33
34 #if NRFX_CHECK(NRFX_TIMER_ENABLED)
35
36 #if !(NRFX_CHECK(NRFX_TIMER0_ENABLED) || NRFX_CHECK(NRFX_TIMER1_ENABLED) || \
37 NRFX_CHECK(NRFX_TIMER2_ENABLED) || NRFX_CHECK(NRFX_TIMER3_ENABLED) || \
38 NRFX_CHECK(NRFX_TIMER4_ENABLED))
39 #error "No enabled TIMER instances. Check <nrfx_config.h>."
40 #endif
41
42 #if NRFX_CHECK(NRFX_TIMER0_ENABLED) && ((1 << 0) & NRFX_TIMERS_USED)
43 #error "TIMER instance 0 is reserved for use outside of nrfx."
44 #endif
45 #if NRFX_CHECK(NRFX_TIMER1_ENABLED) && ((1 << 1) & NRFX_TIMERS_USED)
46 #error "TIMER instance 1 is reserved for use outside of nrfx."
47 #endif
48 #if NRFX_CHECK(NRFX_TIMER2_ENABLED) && ((1 << 2) & NRFX_TIMERS_USED)
49 #error "TIMER instance 2 is reserved for use outside of nrfx."
50 #endif
51 #if NRFX_CHECK(NRFX_TIMER3_ENABLED) && ((1 << 3) & NRFX_TIMERS_USED)
52 #error "TIMER instance 3 is reserved for use outside of nrfx."
53 #endif
54 #if NRFX_CHECK(NRFX_TIMER4_ENABLED) && ((1 << 4) & NRFX_TIMERS_USED)
55 #error "TIMER instance 4 is reserved for use outside of nrfx."
56 #endif
57
58 #include <nrfx_timer.h>
59
60 #define NRFX_LOG_MODULE TIMER
61 #include <nrfx_log.h>
62
63 /**@brief Timer control block. */
64 typedef struct
65 {
66 nrfx_timer_event_handler_t handler;
67 void * context;
68 nrfx_drv_state_t state;
69 } timer_control_block_t;
70
71 static timer_control_block_t m_cb[NRFX_TIMER_ENABLED_COUNT];
72
nrfx_timer_init(nrfx_timer_t const * p_instance,nrfx_timer_config_t const * p_config,nrfx_timer_event_handler_t timer_event_handler)73 nrfx_err_t nrfx_timer_init(nrfx_timer_t const * p_instance,
74 nrfx_timer_config_t const * p_config,
75 nrfx_timer_event_handler_t timer_event_handler)
76 {
77 timer_control_block_t * p_cb = &m_cb[p_instance->instance_id];
78 #ifdef SOFTDEVICE_PRESENT
79 NRFX_ASSERT(p_instance->p_reg != NRF_TIMER0);
80 #endif
81 NRFX_ASSERT(p_config);
82 NRFX_ASSERT(timer_event_handler);
83
84 nrfx_err_t err_code;
85
86 if (p_cb->state != NRFX_DRV_STATE_UNINITIALIZED)
87 {
88 err_code = NRFX_ERROR_INVALID_STATE;
89 NRFX_LOG_WARNING("Function: %s, error code: %s.",
90 __func__,
91 NRFX_LOG_ERROR_STRING_GET(err_code));
92 return err_code;
93 }
94
95 /* Warning 685: Relational operator '<=' always evaluates to 'true'"
96 * Warning in NRF_TIMER_IS_BIT_WIDTH_VALID macro. Macro validate timers resolution.
97 * Not necessary in nRF52 based systems. Obligatory in nRF51 based systems.
98 */
99
100 /*lint -save -e685 */
101
102 NRFX_ASSERT(NRF_TIMER_IS_BIT_WIDTH_VALID(p_instance->p_reg, p_config->bit_width));
103
104 //lint -restore
105
106 p_cb->handler = timer_event_handler;
107 p_cb->context = p_config->p_context;
108
109 uint8_t i;
110 for (i = 0; i < p_instance->cc_channel_count; ++i)
111 {
112 nrf_timer_event_clear(p_instance->p_reg,
113 nrf_timer_compare_event_get(i));
114 }
115
116 NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_instance->p_reg),
117 p_config->interrupt_priority);
118 NRFX_IRQ_ENABLE(nrfx_get_irq_number(p_instance->p_reg));
119
120 nrf_timer_mode_set(p_instance->p_reg, p_config->mode);
121 nrf_timer_bit_width_set(p_instance->p_reg, p_config->bit_width);
122 nrf_timer_frequency_set(p_instance->p_reg, p_config->frequency);
123
124 p_cb->state = NRFX_DRV_STATE_INITIALIZED;
125
126 err_code = NRFX_SUCCESS;
127 NRFX_LOG_INFO("Function: %s, error code: %s.",
128 __func__,
129 NRFX_LOG_ERROR_STRING_GET(err_code));
130 return err_code;
131 }
132
nrfx_timer_uninit(nrfx_timer_t const * p_instance)133 void nrfx_timer_uninit(nrfx_timer_t const * p_instance)
134 {
135 NRFX_IRQ_DISABLE(nrfx_get_irq_number(p_instance->p_reg));
136
137 #define DISABLE_ALL UINT32_MAX
138 nrf_timer_shorts_disable(p_instance->p_reg, DISABLE_ALL);
139 nrf_timer_int_disable(p_instance->p_reg, DISABLE_ALL);
140 #undef DISABLE_ALL
141
142 nrfx_timer_disable(p_instance);
143
144 m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_UNINITIALIZED;
145 NRFX_LOG_INFO("Uninitialized instance: %d.", p_instance->instance_id);
146 }
147
nrfx_timer_enable(nrfx_timer_t const * p_instance)148 void nrfx_timer_enable(nrfx_timer_t const * p_instance)
149 {
150 NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_INITIALIZED);
151 nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START);
152 m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_POWERED_ON;
153 NRFX_LOG_INFO("Enabled instance: %d.", p_instance->instance_id);
154 }
155
nrfx_timer_disable(nrfx_timer_t const * p_instance)156 void nrfx_timer_disable(nrfx_timer_t const * p_instance)
157 {
158 NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
159 nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_SHUTDOWN);
160 m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_INITIALIZED;
161 NRFX_LOG_INFO("Disabled instance: %d.", p_instance->instance_id);
162 }
163
nrfx_timer_is_enabled(nrfx_timer_t const * p_instance)164 bool nrfx_timer_is_enabled(nrfx_timer_t const * p_instance)
165 {
166 NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
167 return (m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_POWERED_ON);
168 }
169
nrfx_timer_resume(nrfx_timer_t const * p_instance)170 void nrfx_timer_resume(nrfx_timer_t const * p_instance)
171 {
172 NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
173 nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START);
174 NRFX_LOG_INFO("Resumed instance: %d.", p_instance->instance_id);
175 }
176
nrfx_timer_pause(nrfx_timer_t const * p_instance)177 void nrfx_timer_pause(nrfx_timer_t const * p_instance)
178 {
179 NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
180 nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_STOP);
181 NRFX_LOG_INFO("Paused instance: %d.", p_instance->instance_id);
182 }
183
nrfx_timer_clear(nrfx_timer_t const * p_instance)184 void nrfx_timer_clear(nrfx_timer_t const * p_instance)
185 {
186 NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
187 nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_CLEAR);
188 }
189
nrfx_timer_increment(nrfx_timer_t const * p_instance)190 void nrfx_timer_increment(nrfx_timer_t const * p_instance)
191 {
192 NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
193 NRFX_ASSERT(nrf_timer_mode_get(p_instance->p_reg) != NRF_TIMER_MODE_TIMER);
194
195 nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_COUNT);
196 }
197
nrfx_timer_capture(nrfx_timer_t const * p_instance,nrf_timer_cc_channel_t cc_channel)198 uint32_t nrfx_timer_capture(nrfx_timer_t const * p_instance,
199 nrf_timer_cc_channel_t cc_channel)
200 {
201 NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
202 NRFX_ASSERT(cc_channel < p_instance->cc_channel_count);
203
204 nrf_timer_task_trigger(p_instance->p_reg,
205 nrf_timer_capture_task_get(cc_channel));
206 return nrf_timer_cc_get(p_instance->p_reg, cc_channel);
207 }
208
nrfx_timer_compare(nrfx_timer_t const * p_instance,nrf_timer_cc_channel_t cc_channel,uint32_t cc_value,bool enable_int)209 void nrfx_timer_compare(nrfx_timer_t const * p_instance,
210 nrf_timer_cc_channel_t cc_channel,
211 uint32_t cc_value,
212 bool enable_int)
213 {
214 nrf_timer_int_mask_t timer_int = nrf_timer_compare_int_get(cc_channel);
215
216 if (enable_int)
217 {
218 nrf_timer_event_clear(p_instance->p_reg, nrf_timer_compare_event_get(cc_channel));
219 nrf_timer_int_enable(p_instance->p_reg, timer_int);
220 }
221 else
222 {
223 nrf_timer_int_disable(p_instance->p_reg, timer_int);
224 }
225
226 nrf_timer_cc_set(p_instance->p_reg, cc_channel, cc_value);
227 NRFX_LOG_INFO("Timer id: %d, capture value set: %lu, channel: %d.",
228 p_instance->instance_id,
229 (unsigned long)cc_value,
230 cc_channel);
231 }
232
nrfx_timer_extended_compare(nrfx_timer_t const * p_instance,nrf_timer_cc_channel_t cc_channel,uint32_t cc_value,nrf_timer_short_mask_t timer_short_mask,bool enable_int)233 void nrfx_timer_extended_compare(nrfx_timer_t const * p_instance,
234 nrf_timer_cc_channel_t cc_channel,
235 uint32_t cc_value,
236 nrf_timer_short_mask_t timer_short_mask,
237 bool enable_int)
238 {
239 nrf_timer_shorts_disable(p_instance->p_reg,
240 (TIMER_SHORTS_COMPARE0_STOP_Msk << cc_channel) |
241 (TIMER_SHORTS_COMPARE0_CLEAR_Msk << cc_channel));
242
243 nrf_timer_shorts_enable(p_instance->p_reg, timer_short_mask);
244
245 nrfx_timer_compare(p_instance,
246 cc_channel,
247 cc_value,
248 enable_int);
249 NRFX_LOG_INFO("Timer id: %d, capture value set: %lu, channel: %d.",
250 p_instance->instance_id,
251 (unsigned long)cc_value,
252 cc_channel);
253 }
254
nrfx_timer_compare_int_enable(nrfx_timer_t const * p_instance,uint32_t channel)255 void nrfx_timer_compare_int_enable(nrfx_timer_t const * p_instance,
256 uint32_t channel)
257 {
258 NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
259 NRFX_ASSERT(channel < p_instance->cc_channel_count);
260
261 nrf_timer_event_clear(p_instance->p_reg,
262 nrf_timer_compare_event_get(channel));
263 nrf_timer_int_enable(p_instance->p_reg,
264 nrf_timer_compare_int_get(channel));
265 }
266
nrfx_timer_compare_int_disable(nrfx_timer_t const * p_instance,uint32_t channel)267 void nrfx_timer_compare_int_disable(nrfx_timer_t const * p_instance,
268 uint32_t channel)
269 {
270 NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
271 NRFX_ASSERT(channel < p_instance->cc_channel_count);
272
273 nrf_timer_int_disable(p_instance->p_reg,
274 nrf_timer_compare_int_get(channel));
275 }
276
irq_handler(NRF_TIMER_Type * p_reg,timer_control_block_t * p_cb,uint8_t channel_count)277 static void irq_handler(NRF_TIMER_Type * p_reg,
278 timer_control_block_t * p_cb,
279 uint8_t channel_count)
280 {
281 uint8_t i;
282 for (i = 0; i < channel_count; ++i)
283 {
284 nrf_timer_event_t event = nrf_timer_compare_event_get(i);
285 nrf_timer_int_mask_t int_mask = nrf_timer_compare_int_get(i);
286
287 if (nrf_timer_event_check(p_reg, event) &&
288 nrf_timer_int_enable_check(p_reg, int_mask))
289 {
290 nrf_timer_event_clear(p_reg, event);
291 NRFX_LOG_DEBUG("Compare event, channel: %d.", i);
292 p_cb->handler(event, p_cb->context);
293 }
294 }
295 }
296
297 #if NRFX_CHECK(NRFX_TIMER0_ENABLED)
nrfx_timer_0_irq_handler(void)298 void nrfx_timer_0_irq_handler(void)
299 {
300 irq_handler(NRF_TIMER0, &m_cb[NRFX_TIMER0_INST_IDX],
301 NRF_TIMER_CC_CHANNEL_COUNT(0));
302 }
303 #endif
304
305 #if NRFX_CHECK(NRFX_TIMER1_ENABLED)
nrfx_timer_1_irq_handler(void)306 void nrfx_timer_1_irq_handler(void)
307 {
308 irq_handler(NRF_TIMER1, &m_cb[NRFX_TIMER1_INST_IDX],
309 NRF_TIMER_CC_CHANNEL_COUNT(1));
310 }
311 #endif
312
313 #if NRFX_CHECK(NRFX_TIMER2_ENABLED)
nrfx_timer_2_irq_handler(void)314 void nrfx_timer_2_irq_handler(void)
315 {
316 irq_handler(NRF_TIMER2, &m_cb[NRFX_TIMER2_INST_IDX],
317 NRF_TIMER_CC_CHANNEL_COUNT(2));
318 }
319 #endif
320
321 #if NRFX_CHECK(NRFX_TIMER3_ENABLED)
nrfx_timer_3_irq_handler(void)322 void nrfx_timer_3_irq_handler(void)
323 {
324 irq_handler(NRF_TIMER3, &m_cb[NRFX_TIMER3_INST_IDX],
325 NRF_TIMER_CC_CHANNEL_COUNT(3));
326 }
327 #endif
328
329 #if NRFX_CHECK(NRFX_TIMER4_ENABLED)
nrfx_timer_4_irq_handler(void)330 void nrfx_timer_4_irq_handler(void)
331 {
332 irq_handler(NRF_TIMER4, &m_cb[NRFX_TIMER4_INST_IDX],
333 NRF_TIMER_CC_CHANNEL_COUNT(4));
334 }
335 #endif
336
337 #endif // NRFX_CHECK(NRFX_TIMER_ENABLED)
338