1 /*
2 * Copyright (c) 2009 Corey Tabaka
3 * Copyright (c) 2015 Intel Corporation
4 *
5 * Use of this source code is governed by a MIT-style
6 * license that can be found in the LICENSE file or at
7 * https://opensource.org/licenses/MIT
8 */
9 #include <sys/types.h>
10 #include <lk/debug.h>
11 #include <lk/err.h>
12 #include <lk/reg.h>
13 #include <lk/trace.h>
14 #include <assert.h>
15 #include <kernel/thread.h>
16 #include <platform/interrupts.h>
17 #include <arch/ops.h>
18 #include <arch/x86.h>
19 #include <kernel/spinlock.h>
20 #include "platform_p.h"
21 #include <platform/pc.h>
22
23 #define LOCAL_TRACE 1
24
25 /* PIC information */
26 /*
27 * Cached IRQ mask (enabled/disabled)
28 */
29 static uint8_t irqMask[2];
30
31 #define PIC1 0x20
32 #define PIC2 0xA0
33
34 #define ICW1 0x11
35 #define ICW4 0x01
36
37 /*
38 * init the PICs and remap them
39 */
map(uint32_t pic1,uint32_t pic2)40 static void map(uint32_t pic1, uint32_t pic2) {
41 /* send ICW1 */
42 outp(PIC1, ICW1);
43 outp(PIC2, ICW1);
44
45 /* send ICW2 */
46 outp(PIC1 + 1, pic1); /* remap */
47 outp(PIC2 + 1, pic2); /* pics */
48
49 /* send ICW3 */
50 outp(PIC1 + 1, 4); /* IRQ2 -> connection to slave */
51 outp(PIC2 + 1, 2);
52
53 /* send ICW4 */
54 outp(PIC1 + 1, 5);
55 outp(PIC2 + 1, 1);
56
57 /* disable all IRQs */
58 outp(PIC1 + 1, 0xff);
59 outp(PIC2 + 1, 0xff);
60
61 irqMask[0] = 0xff;
62 irqMask[1] = 0xff;
63 }
64
pic_init(void)65 void pic_init(void) {
66 // rebase the PIC out of the way of processor exceptions
67 map(INT_PIC1_BASE, INT_PIC2_BASE);
68 }
69
pic_enable(unsigned int vector,bool enable)70 void pic_enable(unsigned int vector, bool enable) {
71 if (vector >= INT_PIC1_BASE && vector < INT_PIC1_BASE + 8) {
72 vector -= INT_PIC1_BASE;
73
74 uint8_t bit = 1 << vector;
75
76 if (enable && (irqMask[0] & bit)) {
77 irqMask[0] = inp(PIC1 + 1);
78 irqMask[0] &= ~bit;
79 outp(PIC1 + 1, irqMask[0]);
80 irqMask[0] = inp(PIC1 + 1);
81 } else if (!enable && !(irqMask[0] & bit)) {
82 irqMask[0] = inp(PIC1 + 1);
83 irqMask[0] |= bit;
84 outp(PIC1 + 1, irqMask[0]);
85 irqMask[0] = inp(PIC1 + 1);
86 }
87 } else if (vector >= INT_PIC2_BASE && vector < INT_PIC2_BASE + 8) {
88 vector -= INT_PIC2_BASE;
89
90 uint8_t bit = 1 << vector;
91
92 if (enable && (irqMask[1] & bit)) {
93 irqMask[1] = inp(PIC2 + 1);
94 irqMask[1] &= ~bit;
95 outp(PIC2 + 1, irqMask[1]);
96 irqMask[1] = inp(PIC2 + 1);
97 } else if (!enable && !(irqMask[1] & bit)) {
98 irqMask[1] = inp(PIC2 + 1);
99 irqMask[1] |= bit;
100 outp(PIC2 + 1, irqMask[1]);
101 irqMask[1] = inp(PIC2 + 1);
102 }
103
104 bit = 1 << (INT_PIC2 - INT_PIC1_BASE);
105
106 if (irqMask[1] != 0xff && (irqMask[0] & bit)) {
107 irqMask[0] = inp(PIC1 + 1);
108 irqMask[0] &= ~bit;
109 outp(PIC1 + 1, irqMask[0]);
110 irqMask[0] = inp(PIC1 + 1);
111 } else if (irqMask[1] == 0 && !(irqMask[0] & bit)) {
112 irqMask[0] = inp(PIC1 + 1);
113 irqMask[0] |= bit;
114 outp(PIC1 + 1, irqMask[0]);
115 irqMask[0] = inp(PIC1 + 1);
116 }
117 }
118 }
119
pic_eoi(unsigned int vector)120 void pic_eoi(unsigned int vector) {
121 if (vector >= INT_PIC1_BASE && vector <= INT_PIC1_BASE + 7) {
122 outp(PIC1, 0x20);
123 } else if (vector >= INT_PIC2_BASE && vector <= INT_PIC2_BASE + 7) {
124 outp(PIC2, 0x20);
125 outp(PIC1, 0x20); // must issue both for the second PIC
126 }
127 }
128
pic_mask_interrupts(void)129 void pic_mask_interrupts(void) {
130 irqMask[0] = inp(PIC1 + 1);
131 irqMask[1] = inp(PIC2 + 1);
132
133 outp(PIC1 + 1, 0xff);
134 outp(PIC2 + 1, 0xff);
135
136 irqMask[0] = inp(PIC1 + 1);
137 irqMask[1] = inp(PIC2 + 1);
138 }
139