Lines Matching refs:region
47 PAS region is configured. The first step is the level 0 table, each entry in the
48 level 0 table controls access to a relatively large region in memory (block
49 descriptor), and the entire region can belong to a single PAS when a one step
83 region definitions in the file ``include/plat/arm/common/arm_pas_def.h``. Table
97 #. The region size
98 #. The desired attributes of this memory region (mapping type, PAS type)
109 compatibility issues. These macros take the base physical address, region size,
111 imply, ``GPT_MAP_REGION_BLOCK`` creates a region using only L0 mapping while
112 ``GPT_MAP_REGION_GRANULE`` creates a region using L0 and L1 mappings.
148 #. DDR discovery and initialization by the system, the discovered DDR region(s)
197 size of each L0 region (L0GPTSZ) multiplied by the size of each L0 descriptor
205 size of each L0 region (L0GPTSZ) divided by the granule size (PGS) divided by