Lines Matching refs:nor_dev
30 static struct nor_device nor_dev; variable
94 if ((nor_dev.flags & SPI_NOR_USE_FSR) != 0U) { in spi_nor_ready()
221 if (nor_dev.selected_bank == 0U) { in spi_nor_clean_bar()
225 nor_dev.selected_bank = 0U; in spi_nor_clean_bar()
232 return spi_nor_reg(nor_dev.bank_write_cmd, &nor_dev.selected_bank, in spi_nor_clean_bar()
241 if (selected_bank == nor_dev.selected_bank) { in spi_nor_write_bar()
250 ret = spi_nor_reg(nor_dev.bank_write_cmd, &selected_bank, in spi_nor_write_bar()
256 nor_dev.selected_bank = selected_bank; in spi_nor_write_bar()
266 ret = spi_nor_reg(nor_dev.bank_read_cmd, &selected_bank, in spi_nor_read_bar()
272 nor_dev.selected_bank = selected_bank; in spi_nor_read_bar()
284 nor_dev.read_op.addr.val = offset; in spi_nor_read()
285 nor_dev.read_op.data.buf = (void *)buffer; in spi_nor_read()
290 if ((nor_dev.flags & SPI_NOR_USE_BANK) != 0U) { in spi_nor_read()
291 ret = spi_nor_write_bar(nor_dev.read_op.addr.val); in spi_nor_read()
296 remain_len = (BANK_SIZE * (nor_dev.selected_bank + 1)) - in spi_nor_read()
297 nor_dev.read_op.addr.val; in spi_nor_read()
298 nor_dev.read_op.data.nbytes = MIN(length, remain_len); in spi_nor_read()
300 nor_dev.read_op.data.nbytes = length; in spi_nor_read()
303 ret = spi_mem_exec_op(&nor_dev.read_op); in spi_nor_read()
309 length -= nor_dev.read_op.data.nbytes; in spi_nor_read()
310 nor_dev.read_op.addr.val += nor_dev.read_op.data.nbytes; in spi_nor_read()
311 nor_dev.read_op.data.buf += nor_dev.read_op.data.nbytes; in spi_nor_read()
312 *length_read += nor_dev.read_op.data.nbytes; in spi_nor_read()
315 if ((nor_dev.flags & SPI_NOR_USE_BANK) != 0U) { in spi_nor_read()
331 nor_dev.read_op.cmd.opcode = SPI_NOR_OP_READ; in spi_nor_init()
332 nor_dev.read_op.cmd.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nor_init()
333 nor_dev.read_op.addr.nbytes = 3U; in spi_nor_init()
334 nor_dev.read_op.addr.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nor_init()
335 nor_dev.read_op.data.buswidth = SPI_MEM_BUSWIDTH_1_LINE; in spi_nor_init()
336 nor_dev.read_op.data.dir = SPI_MEM_DATA_IN; in spi_nor_init()
338 if (plat_get_nor_data(&nor_dev) != 0) { in spi_nor_init()
342 assert(nor_dev.size != 0U); in spi_nor_init()
344 if (nor_dev.size > BANK_SIZE) { in spi_nor_init()
345 nor_dev.flags |= SPI_NOR_USE_BANK; in spi_nor_init()
348 *size = nor_dev.size; in spi_nor_init()
355 if ((nor_dev.flags & SPI_NOR_USE_BANK) != 0U) { in spi_nor_init()
358 nor_dev.bank_read_cmd = SPINOR_OP_BRRD; in spi_nor_init()
359 nor_dev.bank_write_cmd = SPINOR_OP_BRWR; in spi_nor_init()
362 nor_dev.bank_read_cmd = SPINOR_OP_RDEAR; in spi_nor_init()
363 nor_dev.bank_write_cmd = SPINOR_OP_WREAR; in spi_nor_init()
368 if (nor_dev.read_op.data.buswidth == 4U) { in spi_nor_init()
382 if ((ret == 0) && ((nor_dev.flags & SPI_NOR_USE_BANK) != 0U)) { in spi_nor_init()