Lines Matching refs:debug

90 			debug("\nFound highest position %d, mapping to %d, ",  in bist()
94 debug("in dec[%d], bit %d (0x%x)\n", in bist()
100 debug("Increase wait time to %d ms\n", timeout * 10); in bist()
116 debug("Timer remains %d\n", timeout); in bist()
156 debug("*0x%lx = 0x%lx\n", (unsigned long)ddr, val); in dump_ddrc()
317 ddr_out32(&ddr->debug[3], 0x124a02c0); in ddrc_set_regs()
326 if (regs->debug[i] != 0) { in ddrc_set_regs()
332 ddr_out32(&ddr->debug[i], regs->debug[i]); in ddrc_set_regs()
341 debug("Disable address decoding\n"); in ddrc_set_regs()
353 ddr_out32(&ddr->debug[37], (U(1) << 31)); in ddrc_set_regs()
357 debug("Erratum A008511 doesn't apply.\n"); in ddrc_set_regs()
363 tmp = ddr_in32(&ddr->debug[28]); in ddrc_set_regs()
368 if (regs->debug[28] != 0) { in ddrc_set_regs()
370 tmp |= regs->debug[28] & 0xff; in ddrc_set_regs()
374 ddr_out32(&ddr->debug[28], tmp); in ddrc_set_regs()
380 tmp = ddr_in32(&ddr->debug[28]); in ddrc_set_regs()
381 ddr_out32(&ddr->debug[28], tmp | 0x000a0000); in ddrc_set_regs()
440 debug("PHY handshake completed, timer remains %d\n", in ddrc_set_regs()
482 debug("total size %d GB\n", total_mem_per_ctrl_adj); in ddrc_set_regs()
483 debug("Need to wait up to %d ms\n", timeout * 10); in ddrc_set_regs()
491 if (ddr_in32(&ddr->debug[1]) & 0x3d00) { in ddrc_set_regs()
493 ddr_in32(&ddr->debug[1])); in ddrc_set_regs()
501 debug("Restore original bnds\n"); in ddrc_set_regs()
508 debug("Restore address decoding\n"); in ddrc_set_regs()
520 } while (timeout-- > 0 && ((ddr_in32(&ddr->debug[1]) & 0x2) == 0)); in ddrc_set_regs()
549 } while (timeout-- > 0 && ((ddr_in32(&ddr->debug[1]) & 0x2) == 0)); in ddrc_set_regs()
553 tmp = ddr_in32(&ddr->debug[9 + i]); in ddrc_set_regs()
554 debug("Reading debug[%d] as 0x%x\n", i + 9, tmp); in ddrc_set_regs()
561 tmp = ddr_in32(&ddr->debug[13]); in ddrc_set_regs()
565 debug("cpo_min 0x%x\n", cpo_min); in ddrc_set_regs()
566 debug("cpo_max 0x%x\n", cpo_max); in ddrc_set_regs()
567 tmp = ddr_in32(&ddr->debug[28]); in ddrc_set_regs()
568 debug("debug[28] 0x%x\n", tmp); in ddrc_set_regs()
573 debug("Optimal cpo_sample 0x%x\n", in ddrc_set_regs()
578 if ((ddr_in32(&ddr->debug[1]) & in ddrc_set_regs()
581 ddr_in32(&ddr->debug[1])); in ddrc_set_regs()