Lines Matching refs:ctx
216 static int saes_start(struct stm32_saes_context *ctx) in saes_start() argument
221 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_start()
223 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_start()
226 while ((mmio_read_32(ctx->base + _SAES_SR) & _SAES_SR_BUSY) == _SAES_SR_BUSY) { in saes_start()
236 static void saes_end(struct stm32_saes_context *ctx, int prev_error) in saes_end() argument
240 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_end()
242 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_end()
246 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in saes_end()
249 static void saes_write_iv(struct stm32_saes_context *ctx) in saes_write_iv() argument
252 if (does_chaining_mode_need_iv(ctx->cr)) { in saes_write_iv()
257 mmio_write_32(ctx->base + _SAES_IVR0 + i * sizeof(uint32_t), ctx->iv[i]); in saes_write_iv()
263 static void saes_write_key(struct stm32_saes_context *ctx) in saes_write_key() argument
266 if ((ctx->cr & _SAES_CR_KEYSEL_MASK) == (_SAES_CR_KEYSEL_SOFT << _SAES_CR_KEYSEL_SHIFT)) { in saes_write_key()
270 mmio_write_32(ctx->base + _SAES_KEYR0 + i * sizeof(uint32_t), ctx->key[i]); in saes_write_key()
273 if ((ctx->cr & _SAES_CR_KEYSIZE) == _SAES_CR_KEYSIZE) { in saes_write_key()
275 mmio_write_32(ctx->base + _SAES_KEYR4 + i * sizeof(uint32_t), in saes_write_key()
276 ctx->key[i + 4U]); in saes_write_key()
282 static int saes_prepare_key(struct stm32_saes_context *ctx) in saes_prepare_key() argument
285 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in saes_prepare_key()
288 if ((ctx->cr & _SAES_CR_KEYSIZE) != 0U) { in saes_prepare_key()
289 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_KEYSIZE); in saes_prepare_key()
291 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_KEYSIZE); in saes_prepare_key()
294 saes_write_key(ctx); in saes_prepare_key()
297 if ((IS_CHAINING_MODE(ECB, ctx->cr) || IS_CHAINING_MODE(CBC, ctx->cr)) && in saes_prepare_key()
298 is_decrypt(ctx->cr)) { in saes_prepare_key()
302 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_MODE_MASK, in saes_prepare_key()
306 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in saes_prepare_key()
309 ret = wait_computation_completed(ctx->base); in saes_prepare_key()
314 clear_computation_completed(ctx->base); in saes_prepare_key()
317 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_MODE_MASK, in saes_prepare_key()
324 static int save_context(struct stm32_saes_context *ctx) in save_context() argument
326 if ((mmio_read_32(ctx->base + _SAES_SR) & _SAES_SR_CCF) != 0U) { in save_context()
332 ctx->cr = mmio_read_32(ctx->base + _SAES_CR); in save_context()
335 if (does_chaining_mode_need_iv(ctx->cr)) { in save_context()
340 ctx->iv[i] = mmio_read_32(ctx->base + _SAES_IVR0 + i * sizeof(uint32_t)); in save_context()
345 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in save_context()
351 static int restore_context(struct stm32_saes_context *ctx) in restore_context() argument
356 if ((mmio_read_32(ctx->base + _SAES_CR) & _SAES_CR_EN) != 0U) { in restore_context()
362 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in restore_context()
365 mmio_write_32(ctx->base + _SAES_CR, ctx->cr); in restore_context()
368 ret = saes_prepare_key(ctx); in restore_context()
373 saes_write_iv(ctx); in restore_context()
376 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in restore_context()
425 int stm32_saes_init(struct stm32_saes_context *ctx, bool is_dec, in stm32_saes_init() argument
433 ctx->assoc_len = 0U; in stm32_saes_init()
434 ctx->load_len = 0U; in stm32_saes_init()
436 ctx->base = saes_pdata.base; in stm32_saes_init()
437 ctx->cr = _SAES_CR_RESET_VALUE; in stm32_saes_init()
448 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_MODE_MASK, in stm32_saes_init()
452 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_MODE_MASK, in stm32_saes_init()
459 SET_CHAINING_MODE(ECB, (uintptr_t)&(ctx->cr)); in stm32_saes_init()
462 SET_CHAINING_MODE(CBC, (uintptr_t)&(ctx->cr)); in stm32_saes_init()
465 SET_CHAINING_MODE(CTR, (uintptr_t)&(ctx->cr)); in stm32_saes_init()
468 SET_CHAINING_MODE(GCM, (uintptr_t)&(ctx->cr)); in stm32_saes_init()
471 SET_CHAINING_MODE(CCM, (uintptr_t)&(ctx->cr)); in stm32_saes_init()
485 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_DATATYPE_MASK, in stm32_saes_init()
491 mmio_clrbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSIZE); in stm32_saes_init()
494 mmio_setbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSIZE); in stm32_saes_init()
503 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSEL_MASK, in stm32_saes_init()
510 mmio_write_32((uintptr_t)(ctx->key + i), htobe32(key_u32[3 - i])); in stm32_saes_init()
518 mmio_write_32((uintptr_t)(ctx->key + i), htobe32(key_u32[7 - i])); in stm32_saes_init()
530 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSEL_MASK, in stm32_saes_init()
534 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSEL_MASK, in stm32_saes_init()
538 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSEL_MASK, in stm32_saes_init()
542 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSEL_MASK, in stm32_saes_init()
557 mmio_write_32((uintptr_t)(ctx->iv + i), htobe32(iv_u32[3 - i])); in stm32_saes_init()
562 return saes_start(ctx); in stm32_saes_init()
574 int stm32_saes_update_assodata(struct stm32_saes_context *ctx, bool last_block, in stm32_saes_update_assodata() argument
586 ret = restore_context(ctx); in stm32_saes_update_assodata()
591 ret = wait_computation_completed(ctx->base); in stm32_saes_update_assodata()
596 clear_computation_completed(ctx->base); in stm32_saes_update_assodata()
605 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_GCMPH_MASK, in stm32_saes_update_assodata()
609 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in stm32_saes_update_assodata()
616 mmio_write_32(ctx->base + _SAES_DINR, data_u32[w + 0U]); in stm32_saes_update_assodata()
617 mmio_write_32(ctx->base + _SAES_DINR, data_u32[w + 1U]); in stm32_saes_update_assodata()
618 mmio_write_32(ctx->base + _SAES_DINR, data_u32[w + 2U]); in stm32_saes_update_assodata()
619 mmio_write_32(ctx->base + _SAES_DINR, data_u32[w + 3U]); in stm32_saes_update_assodata()
621 ret = wait_computation_completed(ctx->base); in stm32_saes_update_assodata()
626 clear_computation_completed(ctx->base); in stm32_saes_update_assodata()
630 ctx->assoc_len += AES_BLOCK_SIZE_BIT; in stm32_saes_update_assodata()
642 saes_end(ctx, ret); in stm32_saes_update_assodata()
658 int stm32_saes_update_load(struct stm32_saes_context *ctx, bool last_block, in stm32_saes_update_load() argument
673 prev_cr = mmio_read_32(ctx->base + _SAES_CR); in stm32_saes_update_load()
681 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_GCMPH_MASK, in stm32_saes_update_load()
689 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in stm32_saes_update_load()
697 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 0U]); in stm32_saes_update_load()
698 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 1U]); in stm32_saes_update_load()
699 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 2U]); in stm32_saes_update_load()
700 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 3U]); in stm32_saes_update_load()
702 ret = wait_computation_completed(ctx->base); in stm32_saes_update_load()
708 data_out_u32[w + 0U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
709 data_out_u32[w + 1U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
710 data_out_u32[w + 2U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
711 data_out_u32[w + 3U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
713 clear_computation_completed(ctx->base); in stm32_saes_update_load()
717 ctx->load_len += AES_BLOCK_SIZE_BIT; in stm32_saes_update_load()
727 mmio_write_32(ctx->base + _SAES_DINR, block_in[0U]); in stm32_saes_update_load()
728 mmio_write_32(ctx->base + _SAES_DINR, block_in[1U]); in stm32_saes_update_load()
729 mmio_write_32(ctx->base + _SAES_DINR, block_in[2U]); in stm32_saes_update_load()
730 mmio_write_32(ctx->base + _SAES_DINR, block_in[3U]); in stm32_saes_update_load()
732 ret = wait_computation_completed(ctx->base); in stm32_saes_update_load()
739 block_out[0U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
740 block_out[1U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
741 block_out[2U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
742 block_out[3U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
744 clear_computation_completed(ctx->base); in stm32_saes_update_load()
748 ctx->load_len += (data_size - i) * UINT8_BIT; in stm32_saes_update_load()
753 saes_end(ctx, ret); in stm32_saes_update_load()
767 int stm32_saes_final(struct stm32_saes_context *ctx, uint8_t *tag, in stm32_saes_final() argument
774 prev_cr = mmio_read_32(ctx->base + _SAES_CR); in stm32_saes_final()
776 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_GCMPH_MASK, in stm32_saes_final()
783 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in stm32_saes_final()
787 mmio_write_32(ctx->base + _SAES_DINR, 0); in stm32_saes_final()
788 mmio_write_32(ctx->base + _SAES_DINR, ctx->assoc_len); in stm32_saes_final()
789 mmio_write_32(ctx->base + _SAES_DINR, 0); in stm32_saes_final()
790 mmio_write_32(ctx->base + _SAES_DINR, ctx->load_len); in stm32_saes_final()
792 ret = wait_computation_completed(ctx->base); in stm32_saes_final()
798 tag_u32[0] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_final()
799 tag_u32[1] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_final()
800 tag_u32[2] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_final()
801 tag_u32[3] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_final()
803 clear_computation_completed(ctx->base); in stm32_saes_final()
808 saes_end(ctx, ret); in stm32_saes_final()
823 int stm32_saes_update(struct stm32_saes_context *ctx, bool last_block, in stm32_saes_update() argument
851 if (last_block && IS_CHAINING_MODE(CBC, ctx->cr) && is_encrypt(ctx->cr) && in stm32_saes_update()
863 ret = restore_context(ctx); in stm32_saes_update()
873 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 0U]); in stm32_saes_update()
874 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 1U]); in stm32_saes_update()
875 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 2U]); in stm32_saes_update()
876 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 3U]); in stm32_saes_update()
878 ret = wait_computation_completed(ctx->base); in stm32_saes_update()
884 data_out_u32[w + 0U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update()
885 data_out_u32[w + 1U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update()
886 data_out_u32[w + 2U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update()
887 data_out_u32[w + 3U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update()
889 clear_computation_completed(ctx->base); in stm32_saes_update()
903 ret = save_context(ctx); in stm32_saes_update()
909 saes_end(ctx, ret); in stm32_saes_update()