Lines Matching refs:ctl
287 stat = mmio_read_32((uintptr_t)&priv->ctl->stat); in stm32mp1_wait_operating_mode()
291 (uintptr_t)&priv->ctl->stat, stat); in stm32mp1_wait_operating_mode()
321 (uintptr_t)&priv->ctl->stat, stat); in stm32mp1_wait_operating_mode()
338 while ((mmio_read_32((uintptr_t)&priv->ctl->mrstat) & in stm32mp1_mode_register_write()
351 mmio_write_32((uintptr_t)&priv->ctl->mrctrl0, mrctrl0); in stm32mp1_mode_register_write()
353 (uintptr_t)&priv->ctl->mrctrl0, in stm32mp1_mode_register_write()
354 mmio_read_32((uintptr_t)&priv->ctl->mrctrl0), mrctrl0); in stm32mp1_mode_register_write()
355 mmio_write_32((uintptr_t)&priv->ctl->mrctrl1, data); in stm32mp1_mode_register_write()
357 (uintptr_t)&priv->ctl->mrctrl1, in stm32mp1_mode_register_write()
358 mmio_read_32((uintptr_t)&priv->ctl->mrctrl1)); in stm32mp1_mode_register_write()
368 mmio_write_32((uintptr_t)&priv->ctl->mrctrl0, mrctrl0); in stm32mp1_mode_register_write()
370 while ((mmio_read_32((uintptr_t)&priv->ctl->mrstat) & in stm32mp1_mode_register_write()
376 (uintptr_t)&priv->ctl->mrctrl0, mrctrl0); in stm32mp1_mode_register_write()
393 mmio_setbits_32((uintptr_t)&priv->ctl->dbg1, DDRCTRL_DBG1_DIS_HIF); in stm32mp1_ddr3_dll_off()
395 (uintptr_t)&priv->ctl->dbg1, in stm32mp1_ddr3_dll_off()
396 mmio_read_32((uintptr_t)&priv->ctl->dbg1)); in stm32mp1_ddr3_dll_off()
407 dbgcam = mmio_read_32((uintptr_t)&priv->ctl->dbgcam); in stm32mp1_ddr3_dll_off()
409 (uintptr_t)&priv->ctl->dbgcam, dbgcam); in stm32mp1_ddr3_dll_off()
453 mmio_setbits_32((uintptr_t)&priv->ctl->pwrctl, in stm32mp1_ddr3_dll_off()
456 (uintptr_t)&priv->ctl->pwrctl, in stm32mp1_ddr3_dll_off()
457 mmio_read_32((uintptr_t)&priv->ctl->pwrctl)); in stm32mp1_ddr3_dll_off()
471 stm32mp_ddr_start_sw_done(priv->ctl); in stm32mp1_ddr3_dll_off()
473 mmio_setbits_32((uintptr_t)&priv->ctl->mstr, DDRCTRL_MSTR_DLL_OFF_MODE); in stm32mp1_ddr3_dll_off()
475 (uintptr_t)&priv->ctl->mstr, in stm32mp1_ddr3_dll_off()
476 mmio_read_32((uintptr_t)&priv->ctl->mstr)); in stm32mp1_ddr3_dll_off()
478 stm32mp_ddr_wait_sw_done_ack(priv->ctl); in stm32mp1_ddr3_dll_off()
511 mmio_clrbits_32((uintptr_t)&priv->ctl->pwrctl, in stm32mp1_ddr3_dll_off()
527 mmio_clrbits_32((uintptr_t)&priv->ctl->dbg1, DDRCTRL_DBG1_DIS_HIF); in stm32mp1_ddr3_dll_off()
529 (uintptr_t)&priv->ctl->dbg1, in stm32mp1_ddr3_dll_off()
530 mmio_read_32((uintptr_t)&priv->ctl->dbg1)); in stm32mp1_ddr3_dll_off()
533 static void stm32mp1_refresh_disable(struct stm32mp_ddrctl *ctl) in stm32mp1_refresh_disable() argument
535 stm32mp_ddr_start_sw_done(ctl); in stm32mp1_refresh_disable()
537 mmio_setbits_32((uintptr_t)&ctl->rfshctl3, in stm32mp1_refresh_disable()
539 mmio_clrbits_32((uintptr_t)&ctl->pwrctl, DDRCTRL_PWRCTL_POWERDOWN_EN); in stm32mp1_refresh_disable()
540 mmio_clrbits_32((uintptr_t)&ctl->dfimisc, in stm32mp1_refresh_disable()
542 stm32mp_ddr_wait_sw_done_ack(ctl); in stm32mp1_refresh_disable()
545 static void stm32mp1_refresh_restore(struct stm32mp_ddrctl *ctl, in stm32mp1_refresh_restore() argument
548 stm32mp_ddr_start_sw_done(ctl); in stm32mp1_refresh_restore()
550 mmio_clrbits_32((uintptr_t)&ctl->rfshctl3, in stm32mp1_refresh_restore()
554 mmio_setbits_32((uintptr_t)&ctl->pwrctl, in stm32mp1_refresh_restore()
557 mmio_setbits_32((uintptr_t)&ctl->dfimisc, in stm32mp1_refresh_restore()
559 stm32mp_ddr_wait_sw_done_ack(ctl); in stm32mp1_refresh_restore()
622 mmio_clrbits_32((uintptr_t)&priv->ctl->dfimisc, in stm32mp1_ddr_init()
625 (uintptr_t)&priv->ctl->dfimisc, in stm32mp1_ddr_init()
626 mmio_read_32((uintptr_t)&priv->ctl->dfimisc)); in stm32mp1_ddr_init()
635 mmio_clrbits_32((uintptr_t)&priv->ctl->mstr, in stm32mp1_ddr_init()
638 (uintptr_t)&priv->ctl->mstr, in stm32mp1_ddr_init()
639 mmio_read_32((uintptr_t)&priv->ctl->mstr)); in stm32mp1_ddr_init()
646 mmio_clrsetbits_32((uintptr_t)&priv->ctl->init0, in stm32mp1_ddr_init()
650 (uintptr_t)&priv->ctl->init0, in stm32mp1_ddr_init()
651 mmio_read_32((uintptr_t)&priv->ctl->init0)); in stm32mp1_ddr_init()
703 stm32mp_ddr_start_sw_done(priv->ctl); in stm32mp1_ddr_init()
705 mmio_setbits_32((uintptr_t)&priv->ctl->dfimisc, in stm32mp1_ddr_init()
708 (uintptr_t)&priv->ctl->dfimisc, in stm32mp1_ddr_init()
709 mmio_read_32((uintptr_t)&priv->ctl->dfimisc)); in stm32mp1_ddr_init()
711 stm32mp_ddr_wait_sw_done_ack(priv->ctl); in stm32mp1_ddr_init()
734 stm32mp1_refresh_disable(priv->ctl); in stm32mp1_ddr_init()
760 stm32mp1_refresh_restore(priv->ctl, config->c_reg.rfshctl3, in stm32mp1_ddr_init()
763 stm32mp_ddr_enable_axi_port(priv->ctl); in stm32mp1_ddr_init()