Lines Matching refs:ctl
23 return (uintptr_t)priv->ctl; in get_base_addr()
52 void stm32mp_ddr_start_sw_done(struct stm32mp_ddrctl *ctl) in stm32mp_ddr_start_sw_done() argument
54 mmio_clrbits_32((uintptr_t)&ctl->swctl, DDRCTRL_SWCTL_SW_DONE); in stm32mp_ddr_start_sw_done()
56 (uintptr_t)&ctl->swctl, mmio_read_32((uintptr_t)&ctl->swctl)); in stm32mp_ddr_start_sw_done()
60 void stm32mp_ddr_wait_sw_done_ack(struct stm32mp_ddrctl *ctl) in stm32mp_ddr_wait_sw_done_ack() argument
65 mmio_setbits_32((uintptr_t)&ctl->swctl, DDRCTRL_SWCTL_SW_DONE); in stm32mp_ddr_wait_sw_done_ack()
67 (uintptr_t)&ctl->swctl, mmio_read_32((uintptr_t)&ctl->swctl)); in stm32mp_ddr_wait_sw_done_ack()
71 swstat = mmio_read_32((uintptr_t)&ctl->swstat); in stm32mp_ddr_wait_sw_done_ack()
73 (uintptr_t)&ctl->swstat, swstat); in stm32mp_ddr_wait_sw_done_ack()
80 (uintptr_t)&ctl->swstat, swstat); in stm32mp_ddr_wait_sw_done_ack()
83 void stm32mp_ddr_enable_axi_port(struct stm32mp_ddrctl *ctl) in stm32mp_ddr_enable_axi_port() argument
86 mmio_setbits_32((uintptr_t)&ctl->pctrl_0, DDRCTRL_PCTRL_N_PORT_EN); in stm32mp_ddr_enable_axi_port()
87 VERBOSE("[0x%lx] pctrl_0 = 0x%x\n", (uintptr_t)&ctl->pctrl_0, in stm32mp_ddr_enable_axi_port()
88 mmio_read_32((uintptr_t)&ctl->pctrl_0)); in stm32mp_ddr_enable_axi_port()
92 mmio_setbits_32((uintptr_t)&ctl->pctrl_1, DDRCTRL_PCTRL_N_PORT_EN); in stm32mp_ddr_enable_axi_port()
93 VERBOSE("[0x%lx] pctrl_1 = 0x%x\n", (uintptr_t)&ctl->pctrl_1, in stm32mp_ddr_enable_axi_port()
94 mmio_read_32((uintptr_t)&ctl->pctrl_1)); in stm32mp_ddr_enable_axi_port()