Lines Matching refs:timing
167 unsigned long timing, tar, tclr, thiz, twait; in stm32_fmc2_nand_setup_timing() local
172 timing = div_round_up(tar, hclkp) - 1U; in stm32_fmc2_nand_setup_timing()
173 tims.tar = MIN(timing, (unsigned long)FMC2_PCR_TIMING_MASK); in stm32_fmc2_nand_setup_timing()
176 timing = div_round_up(tclr, hclkp) - 1U; in stm32_fmc2_nand_setup_timing()
177 tims.tclr = MIN(timing, (unsigned long)FMC2_PCR_TIMING_MASK); in stm32_fmc2_nand_setup_timing()
190 timing = div_round_up(twait, hclkp); in stm32_fmc2_nand_setup_timing()
191 tims.twait = CLAMP(timing, 1UL, in stm32_fmc2_nand_setup_timing()
207 timing = div_round_up(tset_mem, hclkp); in stm32_fmc2_nand_setup_timing()
208 tims.tset_mem = CLAMP(timing, 1UL, in stm32_fmc2_nand_setup_timing()
229 timing = div_round_up(thold_mem, hclkp); in stm32_fmc2_nand_setup_timing()
230 tims.thold_mem = CLAMP(timing, 1UL, in stm32_fmc2_nand_setup_timing()
252 timing = div_round_up(tset_att, hclkp); in stm32_fmc2_nand_setup_timing()
253 tims.tset_att = CLAMP(timing, 1UL, in stm32_fmc2_nand_setup_timing()
298 timing = div_round_up(thold_att, hclkp); in stm32_fmc2_nand_setup_timing()
299 tims.thold_att = CLAMP(timing, 1UL, in stm32_fmc2_nand_setup_timing()