Lines Matching refs:hi2c
45 static void notif_i2c_timeout(struct i2c_handle_s *hi2c) in notif_i2c_timeout() argument
47 hi2c->i2c_err |= I2C_ERROR_TIMEOUT; in notif_i2c_timeout()
48 hi2c->i2c_mode = I2C_MODE_NONE; in notif_i2c_timeout()
49 hi2c->i2c_state = I2C_STATE_READY; in notif_i2c_timeout()
59 static int i2c_config_analog_filter(struct i2c_handle_s *hi2c, in i2c_config_analog_filter() argument
62 if ((hi2c->i2c_state != I2C_STATE_READY) || (hi2c->lock != 0U)) { in i2c_config_analog_filter()
66 hi2c->lock = 1; in i2c_config_analog_filter()
68 hi2c->i2c_state = I2C_STATE_BUSY; in i2c_config_analog_filter()
71 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_PE); in i2c_config_analog_filter()
74 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_ANFOFF); in i2c_config_analog_filter()
77 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR1, analog_filter); in i2c_config_analog_filter()
80 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_PE); in i2c_config_analog_filter()
82 hi2c->i2c_state = I2C_STATE_READY; in i2c_config_analog_filter()
84 hi2c->lock = 0; in i2c_config_analog_filter()
146 int stm32_i2c_init(struct i2c_handle_s *hi2c, in stm32_i2c_init() argument
152 if (hi2c == NULL) { in stm32_i2c_init()
156 if (hi2c->i2c_state == I2C_STATE_RESET) { in stm32_i2c_init()
157 hi2c->lock = 0; in stm32_i2c_init()
160 hi2c->i2c_state = I2C_STATE_BUSY; in stm32_i2c_init()
162 clk_enable(hi2c->clock); in stm32_i2c_init()
165 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_PE); in stm32_i2c_init()
168 mmio_write_32(hi2c->i2c_base_addr + I2C_TIMINGR, in stm32_i2c_init()
172 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_OAR1, I2C_OAR1_OA1EN); in stm32_i2c_init()
176 mmio_write_32(hi2c->i2c_base_addr + I2C_OAR1, in stm32_i2c_init()
179 mmio_write_32(hi2c->i2c_base_addr + I2C_OAR1, in stm32_i2c_init()
184 mmio_write_32(hi2c->i2c_base_addr + I2C_CR2, 0); in stm32_i2c_init()
188 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR2, I2C_CR2_ADD10); in stm32_i2c_init()
195 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR2, in stm32_i2c_init()
199 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_OAR2, I2C_DUALADDRESS_ENABLE); in stm32_i2c_init()
202 mmio_write_32(hi2c->i2c_base_addr + I2C_OAR2, in stm32_i2c_init()
208 mmio_write_32(hi2c->i2c_base_addr + I2C_CR1, in stm32_i2c_init()
213 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_PE); in stm32_i2c_init()
215 hi2c->i2c_err = I2C_ERROR_NONE; in stm32_i2c_init()
216 hi2c->i2c_state = I2C_STATE_READY; in stm32_i2c_init()
217 hi2c->i2c_mode = I2C_MODE_NONE; in stm32_i2c_init()
219 rc = i2c_config_analog_filter(hi2c, init_data->analog_filter ? in stm32_i2c_init()
224 clk_disable(hi2c->clock); in stm32_i2c_init()
228 clk_disable(hi2c->clock); in stm32_i2c_init()
238 static void i2c_flush_txdr(struct i2c_handle_s *hi2c) in i2c_flush_txdr() argument
244 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & I2C_FLAG_TXIS) != in i2c_flush_txdr()
246 mmio_write_32(hi2c->i2c_base_addr + I2C_TXDR, 0); in i2c_flush_txdr()
250 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & I2C_FLAG_TXE) == in i2c_flush_txdr()
252 mmio_setbits_32(hi2c->i2c_base_addr + I2C_ISR, in i2c_flush_txdr()
266 static int i2c_wait_flag(struct i2c_handle_s *hi2c, uint32_t flag, in i2c_wait_flag() argument
270 uint32_t isr = mmio_read_32(hi2c->i2c_base_addr + I2C_ISR); in i2c_wait_flag()
277 notif_i2c_timeout(hi2c); in i2c_wait_flag()
278 hi2c->lock = 0; in i2c_wait_flag()
293 static int i2c_ack_failed(struct i2c_handle_s *hi2c, uint64_t timeout_ref) in i2c_ack_failed() argument
295 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & I2C_FLAG_AF) == 0U) { in i2c_ack_failed()
303 while ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in i2c_ack_failed()
306 notif_i2c_timeout(hi2c); in i2c_ack_failed()
307 hi2c->lock = 0; in i2c_ack_failed()
313 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_AF); in i2c_ack_failed()
315 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_STOPF); in i2c_ack_failed()
317 i2c_flush_txdr(hi2c); in i2c_ack_failed()
319 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR2, I2C_RESET_CR2); in i2c_ack_failed()
321 hi2c->i2c_err |= I2C_ERROR_AF; in i2c_ack_failed()
322 hi2c->i2c_state = I2C_STATE_READY; in i2c_ack_failed()
323 hi2c->i2c_mode = I2C_MODE_NONE; in i2c_ack_failed()
325 hi2c->lock = 0; in i2c_ack_failed()
338 static int i2c_wait_txis(struct i2c_handle_s *hi2c, uint64_t timeout_ref) in i2c_wait_txis() argument
340 while ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in i2c_wait_txis()
342 if (i2c_ack_failed(hi2c, timeout_ref) != 0) { in i2c_wait_txis()
347 notif_i2c_timeout(hi2c); in i2c_wait_txis()
348 hi2c->lock = 0; in i2c_wait_txis()
365 static int i2c_wait_stop(struct i2c_handle_s *hi2c, uint64_t timeout_ref) in i2c_wait_stop() argument
367 while ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in i2c_wait_stop()
369 if (i2c_ack_failed(hi2c, timeout_ref) != 0) { in i2c_wait_stop()
374 notif_i2c_timeout(hi2c); in i2c_wait_stop()
375 hi2c->lock = 0; in i2c_wait_stop()
405 static void i2c_transfer_config(struct i2c_handle_s *hi2c, uint16_t dev_addr, in i2c_transfer_config() argument
419 mmio_clrsetbits_32(hi2c->i2c_base_addr + I2C_CR2, clr_value, set_value); in i2c_transfer_config()
433 static int i2c_request_memory_write(struct i2c_handle_s *hi2c, in i2c_request_memory_write() argument
437 i2c_transfer_config(hi2c, dev_addr, mem_add_size, I2C_RELOAD_MODE, in i2c_request_memory_write()
440 if (i2c_wait_txis(hi2c, timeout_ref) != 0) { in i2c_request_memory_write()
446 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_write()
450 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_write()
453 if (i2c_wait_txis(hi2c, timeout_ref) != 0) { in i2c_request_memory_write()
458 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_write()
462 if (i2c_wait_flag(hi2c, I2C_FLAG_TCR, 0, timeout_ref) != 0) { in i2c_request_memory_write()
480 static int i2c_request_memory_read(struct i2c_handle_s *hi2c, uint16_t dev_addr, in i2c_request_memory_read() argument
484 i2c_transfer_config(hi2c, dev_addr, mem_add_size, I2C_SOFTEND_MODE, in i2c_request_memory_read()
487 if (i2c_wait_txis(hi2c, timeout_ref) != 0) { in i2c_request_memory_read()
493 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_read()
497 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_read()
500 if (i2c_wait_txis(hi2c, timeout_ref) != 0) { in i2c_request_memory_read()
505 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_read()
509 if (i2c_wait_flag(hi2c, I2C_FLAG_TC, 0, timeout_ref) != 0) { in i2c_request_memory_read()
529 static int i2c_write(struct i2c_handle_s *hi2c, uint16_t dev_addr, in i2c_write() argument
544 if ((hi2c->i2c_state != I2C_STATE_READY) || (hi2c->lock != 0U)) { in i2c_write()
552 clk_enable(hi2c->clock); in i2c_write()
554 hi2c->lock = 1; in i2c_write()
557 if (i2c_wait_flag(hi2c, I2C_FLAG_BUSY, 1, timeout_ref) != 0) { in i2c_write()
561 hi2c->i2c_state = I2C_STATE_BUSY_TX; in i2c_write()
562 hi2c->i2c_mode = mode; in i2c_write()
563 hi2c->i2c_err = I2C_ERROR_NONE; in i2c_write()
569 if (i2c_request_memory_write(hi2c, dev_addr, mem_addr, in i2c_write()
576 i2c_transfer_config(hi2c, dev_addr, xfer_size, in i2c_write()
580 i2c_transfer_config(hi2c, dev_addr, xfer_size, in i2c_write()
587 i2c_transfer_config(hi2c, dev_addr, xfer_size, in i2c_write()
592 i2c_transfer_config(hi2c, dev_addr, xfer_size, in i2c_write()
599 if (i2c_wait_txis(hi2c, timeout_ref) != 0) { in i2c_write()
603 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, *p_buff); in i2c_write()
610 if (i2c_wait_flag(hi2c, I2C_FLAG_TCR, 0, in i2c_write()
617 i2c_transfer_config(hi2c, dev_addr, in i2c_write()
623 i2c_transfer_config(hi2c, dev_addr, in i2c_write()
637 if (i2c_wait_stop(hi2c, timeout_ref) != 0) { in i2c_write()
641 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_STOPF); in i2c_write()
643 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR2, I2C_RESET_CR2); in i2c_write()
645 hi2c->i2c_state = I2C_STATE_READY; in i2c_write()
646 hi2c->i2c_mode = I2C_MODE_NONE; in i2c_write()
651 hi2c->lock = 0; in i2c_write()
652 clk_disable(hi2c->clock); in i2c_write()
670 int stm32_i2c_mem_write(struct i2c_handle_s *hi2c, uint16_t dev_addr, in stm32_i2c_mem_write() argument
674 return i2c_write(hi2c, dev_addr, mem_addr, mem_add_size, in stm32_i2c_mem_write()
688 int stm32_i2c_master_transmit(struct i2c_handle_s *hi2c, uint16_t dev_addr, in stm32_i2c_master_transmit() argument
692 return i2c_write(hi2c, dev_addr, 0, 0, in stm32_i2c_master_transmit()
710 static int i2c_read(struct i2c_handle_s *hi2c, uint16_t dev_addr, in i2c_read() argument
725 if ((hi2c->i2c_state != I2C_STATE_READY) || (hi2c->lock != 0U)) { in i2c_read()
733 clk_enable(hi2c->clock); in i2c_read()
735 hi2c->lock = 1; in i2c_read()
738 if (i2c_wait_flag(hi2c, I2C_FLAG_BUSY, 1, timeout_ref) != 0) { in i2c_read()
742 hi2c->i2c_state = I2C_STATE_BUSY_RX; in i2c_read()
743 hi2c->i2c_mode = mode; in i2c_read()
744 hi2c->i2c_err = I2C_ERROR_NONE; in i2c_read()
748 if (i2c_request_memory_read(hi2c, dev_addr, mem_addr, in i2c_read()
761 i2c_transfer_config(hi2c, dev_addr, xfer_size, in i2c_read()
765 i2c_transfer_config(hi2c, dev_addr, xfer_size, in i2c_read()
770 if (i2c_wait_flag(hi2c, I2C_FLAG_RXNE, 0, timeout_ref) != 0) { in i2c_read()
774 *p_buff = mmio_read_8(hi2c->i2c_base_addr + I2C_RXDR); in i2c_read()
780 if (i2c_wait_flag(hi2c, I2C_FLAG_TCR, 0, in i2c_read()
787 i2c_transfer_config(hi2c, dev_addr, in i2c_read()
793 i2c_transfer_config(hi2c, dev_addr, in i2c_read()
806 if (i2c_wait_stop(hi2c, timeout_ref) != 0) { in i2c_read()
810 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_STOPF); in i2c_read()
812 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR2, I2C_RESET_CR2); in i2c_read()
814 hi2c->i2c_state = I2C_STATE_READY; in i2c_read()
815 hi2c->i2c_mode = I2C_MODE_NONE; in i2c_read()
820 hi2c->lock = 0; in i2c_read()
821 clk_disable(hi2c->clock); in i2c_read()
839 int stm32_i2c_mem_read(struct i2c_handle_s *hi2c, uint16_t dev_addr, in stm32_i2c_mem_read() argument
843 return i2c_read(hi2c, dev_addr, mem_addr, mem_add_size, in stm32_i2c_mem_read()
857 int stm32_i2c_master_receive(struct i2c_handle_s *hi2c, uint16_t dev_addr, in stm32_i2c_master_receive() argument
861 return i2c_read(hi2c, dev_addr, 0, 0, in stm32_i2c_master_receive()
875 bool stm32_i2c_is_device_ready(struct i2c_handle_s *hi2c, in stm32_i2c_is_device_ready() argument
882 if ((hi2c->i2c_state != I2C_STATE_READY) || (hi2c->lock != 0U)) { in stm32_i2c_is_device_ready()
886 clk_enable(hi2c->clock); in stm32_i2c_is_device_ready()
888 hi2c->lock = 1; in stm32_i2c_is_device_ready()
889 hi2c->i2c_mode = I2C_MODE_NONE; in stm32_i2c_is_device_ready()
891 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & I2C_FLAG_BUSY) != in stm32_i2c_is_device_ready()
896 hi2c->i2c_state = I2C_STATE_BUSY; in stm32_i2c_is_device_ready()
897 hi2c->i2c_err = I2C_ERROR_NONE; in stm32_i2c_is_device_ready()
903 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_OAR1) & in stm32_i2c_is_device_ready()
905 mmio_write_32(hi2c->i2c_base_addr + I2C_CR2, in stm32_i2c_is_device_ready()
910 mmio_write_32(hi2c->i2c_base_addr + I2C_CR2, in stm32_i2c_is_device_ready()
923 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in stm32_i2c_is_device_ready()
929 notif_i2c_timeout(hi2c); in stm32_i2c_is_device_ready()
934 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in stm32_i2c_is_device_ready()
936 if (i2c_wait_flag(hi2c, I2C_FLAG_STOPF, 0, in stm32_i2c_is_device_ready()
941 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, in stm32_i2c_is_device_ready()
944 hi2c->i2c_state = I2C_STATE_READY; in stm32_i2c_is_device_ready()
950 if (i2c_wait_flag(hi2c, I2C_FLAG_STOPF, 0, timeout_ref) != 0) { in stm32_i2c_is_device_ready()
954 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_AF); in stm32_i2c_is_device_ready()
956 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_STOPF); in stm32_i2c_is_device_ready()
959 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR2, in stm32_i2c_is_device_ready()
962 if (i2c_wait_flag(hi2c, I2C_FLAG_STOPF, 0, in stm32_i2c_is_device_ready()
967 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, in stm32_i2c_is_device_ready()
974 notif_i2c_timeout(hi2c); in stm32_i2c_is_device_ready()
977 hi2c->lock = 0; in stm32_i2c_is_device_ready()
978 clk_disable(hi2c->clock); in stm32_i2c_is_device_ready()