Lines Matching refs:i2c_base_addr
71 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_PE); in i2c_config_analog_filter()
74 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_ANFOFF); in i2c_config_analog_filter()
77 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR1, analog_filter); in i2c_config_analog_filter()
80 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_PE); in i2c_config_analog_filter()
165 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_PE); in stm32_i2c_init()
168 mmio_write_32(hi2c->i2c_base_addr + I2C_TIMINGR, in stm32_i2c_init()
172 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_OAR1, I2C_OAR1_OA1EN); in stm32_i2c_init()
176 mmio_write_32(hi2c->i2c_base_addr + I2C_OAR1, in stm32_i2c_init()
179 mmio_write_32(hi2c->i2c_base_addr + I2C_OAR1, in stm32_i2c_init()
184 mmio_write_32(hi2c->i2c_base_addr + I2C_CR2, 0); in stm32_i2c_init()
188 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR2, I2C_CR2_ADD10); in stm32_i2c_init()
195 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR2, in stm32_i2c_init()
199 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_OAR2, I2C_DUALADDRESS_ENABLE); in stm32_i2c_init()
202 mmio_write_32(hi2c->i2c_base_addr + I2C_OAR2, in stm32_i2c_init()
208 mmio_write_32(hi2c->i2c_base_addr + I2C_CR1, in stm32_i2c_init()
213 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR1, I2C_CR1_PE); in stm32_i2c_init()
244 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & I2C_FLAG_TXIS) != in i2c_flush_txdr()
246 mmio_write_32(hi2c->i2c_base_addr + I2C_TXDR, 0); in i2c_flush_txdr()
250 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & I2C_FLAG_TXE) == in i2c_flush_txdr()
252 mmio_setbits_32(hi2c->i2c_base_addr + I2C_ISR, in i2c_flush_txdr()
270 uint32_t isr = mmio_read_32(hi2c->i2c_base_addr + I2C_ISR); in i2c_wait_flag()
295 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & I2C_FLAG_AF) == 0U) { in i2c_ack_failed()
303 while ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in i2c_ack_failed()
313 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_AF); in i2c_ack_failed()
315 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_STOPF); in i2c_ack_failed()
319 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR2, I2C_RESET_CR2); in i2c_ack_failed()
340 while ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in i2c_wait_txis()
367 while ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in i2c_wait_stop()
419 mmio_clrsetbits_32(hi2c->i2c_base_addr + I2C_CR2, clr_value, set_value); in i2c_transfer_config()
446 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_write()
450 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_write()
458 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_write()
493 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_read()
497 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_read()
505 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, in i2c_request_memory_read()
603 mmio_write_8(hi2c->i2c_base_addr + I2C_TXDR, *p_buff); in i2c_write()
641 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_STOPF); in i2c_write()
643 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR2, I2C_RESET_CR2); in i2c_write()
774 *p_buff = mmio_read_8(hi2c->i2c_base_addr + I2C_RXDR); in i2c_read()
810 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_STOPF); in i2c_read()
812 mmio_clrbits_32(hi2c->i2c_base_addr + I2C_CR2, I2C_RESET_CR2); in i2c_read()
891 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & I2C_FLAG_BUSY) != in stm32_i2c_is_device_ready()
903 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_OAR1) & in stm32_i2c_is_device_ready()
905 mmio_write_32(hi2c->i2c_base_addr + I2C_CR2, in stm32_i2c_is_device_ready()
910 mmio_write_32(hi2c->i2c_base_addr + I2C_CR2, in stm32_i2c_is_device_ready()
923 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in stm32_i2c_is_device_ready()
934 if ((mmio_read_32(hi2c->i2c_base_addr + I2C_ISR) & in stm32_i2c_is_device_ready()
941 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, in stm32_i2c_is_device_ready()
954 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_AF); in stm32_i2c_is_device_ready()
956 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, I2C_FLAG_STOPF); in stm32_i2c_is_device_ready()
959 mmio_setbits_32(hi2c->i2c_base_addr + I2C_CR2, in stm32_i2c_is_device_ready()
967 mmio_write_32(hi2c->i2c_base_addr + I2C_ICR, in stm32_i2c_is_device_ready()