Lines Matching refs:reg_base
145 mmio_write_32(dw_params.reg_base + DWMMC_CMD, in dw_update_clk()
149 data = mmio_read_32(dw_params.reg_base + DWMMC_CMD); in dw_update_clk()
152 data = mmio_read_32(dw_params.reg_base + DWMMC_RINTSTS); in dw_update_clk()
173 data = mmio_read_32(dw_params.reg_base + DWMMC_STATUS); in dw_set_clk()
177 mmio_write_32(dw_params.reg_base + DWMMC_CLKENA, 0); in dw_set_clk()
180 mmio_write_32(dw_params.reg_base + DWMMC_CLKDIV, div); in dw_set_clk()
184 mmio_write_32(dw_params.reg_base + DWMMC_CLKENA, 1); in dw_set_clk()
185 mmio_write_32(dw_params.reg_base + DWMMC_CLKSRC, 0); in dw_set_clk()
194 assert((dw_params.reg_base & MMC_BLOCK_MASK) == 0); in dw_init()
196 base = dw_params.reg_base; in dw_init()
234 base = dw_params.reg_base; in dw_send_cmd()
326 mmio_write_32(dw_params.reg_base + DWMMC_CTYPE, CTYPE_1BIT); in dw_set_ios()
329 mmio_write_32(dw_params.reg_base + DWMMC_CTYPE, CTYPE_4BIT); in dw_set_ios()
332 mmio_write_32(dw_params.reg_base + DWMMC_CTYPE, CTYPE_8BIT); in dw_set_ios()
350 ((dw_params.reg_base & MMC_BLOCK_MASK) == 0) && in dw_prepare()
360 base = dw_params.reg_base; in dw_prepare()
402 data = mmio_read_32(dw_params.reg_base + DWMMC_RINTSTS); in dw_read()
419 ((params->reg_base & MMC_BLOCK_MASK) == 0) && in dw_mmc_init()