Lines Matching refs:r0
34 ldcopr r0, SCTLR
35 orr r0, r0, r1
36 stcopr r0, SCTLR
46 ldr r0, =(SCR_RESET_VAL | SCR_SIF_BIT)
47 stcopr r0, SCR
74 ldcopr r0, NSACR
75 and r0, r0, #NSACR_IMP_DEF_MASK
76 orr r0, r0, #(NSACR_RESET_VAL | NSACR_ENABLE_FP_ACCESS)
81 orr r0, r0, #NSTRCDIS_BIT
83 stcopr r0, NSACR
99 ldr r0, =((CPACR_RESET_VAL | CPACR_ENABLE_FP_ACCESS) & ~(TRCDIS_BIT))
100 stcopr r0, CPACR
118 ldr r0, =(FPEXC_RESET_VAL | FPEXC_EN_BIT)
119 vmsr FPEXC, r0
142 ldr r0, =((SDCR_RESET_VAL | SDCR_SPD(SDCR_SPD_DISABLE) | \
148 orr r0, r0, #SDCR_TTRF_BIT
150 stcopr r0, SDCR
172 ldr r0, =(PMCR_RESET_VAL | PMCR_DP_BIT | PMCR_LC_BIT | \
175 ldr r0, =(PMCR_RESET_VAL | PMCR_DP_BIT)
177 stcopr r0, PMCR
183 ldcopr r0, ID_PFR0
184 and r0, r0, #(ID_PFR0_DIT_MASK << ID_PFR0_DIT_SHIFT)
185 cmp r0, #ID_PFR0_DIT_SUPPORTED
187 mrs r0, cpsr
188 orr r0, r0, #CPSR_DIT_BIT
189 msr cpsr_cxsf, r0
245 ldcopr r0, SCR
246 tst r0, #SCR_NS_BIT
270 ldr r0, =(SCTLR_RESET_VAL & ~(SCTLR_TE_BIT | SCTLR_EE_BIT | \
272 stcopr r0, SCTLR
293 cmp r0, #0
294 bxne r0
309 ldr r0, =pie_fixup
311 and r0, r0, r1
313 add r1, r1, r0
322 ldr r0, =\_exception_vectors
323 stcopr r0, VBAR
324 stcopr r0, MVBAR
347 cmp r0, #0
391 ldr r0, =__TEXT_START__
393 ldr r0, =__RO_START__
396 ldr r0, =__RW_START__
399 sub r1, r1, r0
402 ldr r0, =__BL2_NOLOAD_START__
404 sub r1, r1, r0
414 ldr r0, =__BSS_START__
416 sub r1, r1, r0
420 ldr r0, =__COHERENT_RAM_START__
422 sub r1, r1, r0
434 ldr r0, =__DATA_RAM_START__
437 sub r2, r2, r0