Lines Matching refs:x0
42 cbz x0, 1f
45 ldr x0, =0x0
46 msr CPUPSELR_EL3, x0
47 ldr x0, =0xF3BF8F2F
48 msr CPUPOR_EL3, x0
49 ldr x0, =0xFFFFFFFF
50 msr CPUPMR_EL3, x0
51 ldr x0, =0x800200071
52 msr CPUPCR_EL3, x0
73 mrs x0, id_aa64pfr1_el1
74 tst x0, #(ID_AA64PFR1_EL1_SSBS_MASK << ID_AA64PFR1_EL1_SSBS_SHIFT)
96 cbz x0, 1f
122 cbz x0, 1f
148 cbz x0, 1f
175 cbz x0, 1f
201 cbz x0, 1f
227 cbz x0, 1f
253 cbz x0, 1f
279 cbz x0, 1f
305 cbz x0, 1f
331 cbz x0, 1f
333 mrs x0, NEOVERSE_N1_CPUACTLR2_EL1
334 orr x0, x0, #NEOVERSE_N1_CPUACTLR2_EL1_BIT_16
335 msr NEOVERSE_N1_CPUACTLR2_EL1, x0
359 cbz x0, 1f
362 ldr x0, =0x0
363 msr CPUPSELR_EL3, x0
364 ldr x0, =0xEE670D35
365 msr CPUPOR_EL3, x0
366 ldr x0, =0xFFFF0FFF
367 msr CPUPMR_EL3, x0
368 ldr x0, =0x08000020007D
369 msr CPUPCR_EL3, x0
399 cbz x0, 1f
430 cbz x0, 1f
432 mov x0, #3
433 msr S3_6_C15_C8_0, x0
434 ldr x0, =0x10E3900002
435 msr S3_6_C15_C8_2, x0
436 ldr x0, =0x10FFF00083
437 msr S3_6_C15_C8_3, x0
438 ldr x0, =0x2001003FF
439 msr S3_6_C15_C8_1, x0
441 mov x0, #4
442 msr S3_6_C15_C8_0, x0
443 ldr x0, =0x10E3800082
444 msr S3_6_C15_C8_2, x0
445 ldr x0, =0x10FFF00083
446 msr S3_6_C15_C8_3, x0
447 ldr x0, =0x2001003FF
448 msr S3_6_C15_C8_1, x0
450 mov x0, #5
451 msr S3_6_C15_C8_0, x0
452 ldr x0, =0x10E3800200
453 msr S3_6_C15_C8_2, x0
454 ldr x0, =0x10FFF003E0
455 msr S3_6_C15_C8_3, x0
456 ldr x0, =0x2001003FF
457 msr S3_6_C15_C8_1, x0
481 cbz x0, 1f
497 mov x0, #ERRATA_APPLIES
499 mov x0, #ERRATA_MISSING
510 mrs x0, NEOVERSE_N1_CPUACTLR2_EL1
511 orr x0, x0, #NEOVERSE_N1_CPUACTLR2_EL1_BIT_2
512 msr NEOVERSE_N1_CPUACTLR2_EL1, x0
516 mov x18, x0
519 mov x0, x18
524 mov x0, x18
529 mov x0, x18
534 mov x0, x18
539 mov x0, x18
544 mov x0, x18
549 mov x0, x18
554 mov x0, x18
559 mov x0, x18
564 mov x0, x18
569 mov x0, x18
574 mov x0, x18
579 mov x0, x18
584 mov x0, x18
590 mrs x0, actlr_el3
591 orr x0, x0, #NEOVERSE_N1_ACTLR_AMEN_BIT
592 msr actlr_el3, x0
595 mrs x0, actlr_el2
596 orr x0, x0, #NEOVERSE_N1_ACTLR_AMEN_BIT
597 msr actlr_el2, x0
600 mov x0, #NEOVERSE_N1_AMU_GROUP0_MASK
601 msr CPUAMCNTENSET_EL0, x0
606 mrs x0, NEOVERSE_N1_CPUECTLR_EL1
607 orr x0, x0, NEOVERSE_N1_CPUECTLR_EL1_EXTLLC_BIT
608 msr NEOVERSE_N1_CPUECTLR_EL1, x0
620 adr x0, wa_cve_vbar_neoverse_n1
621 msr vbar_el3, x0
637 mrs x0, NEOVERSE_N1_CPUPWRCTLR_EL1
638 orr x0, x0, #NEOVERSE_N1_CORE_PWRDN_EN_MASK
639 msr NEOVERSE_N1_CPUPWRCTLR_EL1, x0
658 mov x8, x0
704 ldp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]