Lines Matching refs:UL
38 #define PLAT_ARM_TRUSTED_SRAM_SIZE UL(0x00040000) /* 256 KB */
40 #define PLAT_ARM_TRUSTED_ROM_BASE UL(0x00000000)
41 #define PLAT_ARM_TRUSTED_ROM_SIZE UL(0x04000000) /* 64 MB */
43 #define PLAT_ARM_TRUSTED_DRAM_BASE UL(0x06000000)
44 #define PLAT_ARM_TRUSTED_DRAM_SIZE UL(0x02000000) /* 32 MB */
57 #define PLAT_ARM_SPMC_SIZE UL(0x200000) /* 2 MB */
61 #define PLAT_ARM_MEM_PROTEC_VA_FRAME UL(0xc0000000)
64 #define PLAT_ARM_SCP_TZC_DRAM1_SIZE UL(0x0)
121 #define PLAT_ARM_NS_IMAGE_BASE (ARM_DRAM1_BASE + UL(0x8000000))
174 #define PLAT_ARM_MAX_BL1_RW_SIZE UL(0xB000)
181 #define PLAT_ARM_MAX_ROMLIB_RW_SIZE UL(0x1000)
182 #define PLAT_ARM_MAX_ROMLIB_RO_SIZE UL(0xe000)
183 #define FVP_BL2_ROMLIB_OPTIMIZATION UL(0x5000)
185 #define PLAT_ARM_MAX_ROMLIB_RW_SIZE UL(0)
186 #define PLAT_ARM_MAX_ROMLIB_RO_SIZE UL(0)
187 #define FVP_BL2_ROMLIB_OPTIMIZATION UL(0)
195 # define PLAT_ARM_MAX_BL2_SIZE (UL(0x1E000) - FVP_BL2_ROMLIB_OPTIMIZATION)
197 # define PLAT_ARM_MAX_BL2_SIZE (UL(0x1D000) - FVP_BL2_ROMLIB_OPTIMIZATION)
200 # define PLAT_ARM_MAX_BL2_SIZE (UL(0x1F000) - FVP_BL2_ROMLIB_OPTIMIZATION)
202 # define PLAT_ARM_MAX_BL2_SIZE (UL(0x13000) - FVP_BL2_ROMLIB_OPTIMIZATION)
216 #define PLAT_ARM_MAX_BL31_SIZE (UL(0x3D000) - ARM_L0_GPT_SIZE)
230 # define PLAT_ARM_MAX_BL32_SIZE UL(0x3B000)
239 # define PLATFORM_STACK_SIZE UL(0x1000)
241 # define PLATFORM_STACK_SIZE UL(0x500)
245 # define PLATFORM_STACK_SIZE UL(0x1000)
247 # define PLATFORM_STACK_SIZE UL(0x600)
250 # define PLATFORM_STACK_SIZE UL(0x400)
253 # define PLATFORM_STACK_SIZE UL(0x1000)
255 # define PLATFORM_STACK_SIZE UL(0x800)
259 # define PLATFORM_STACK_SIZE UL(0x1000)
261 # define PLATFORM_STACK_SIZE UL(0x440)
264 # define PLATFORM_STACK_SIZE UL(0x440)
305 #define PLAT_FVP_SMMUV3_BASE UL(0x2b400000)
306 #define PLAT_ARM_SMMUV3_ROOT_REG_OFFSET UL(0x20000)
309 #define PLAT_FVP_CCI400_BASE UL(0x2c090000)
314 #define PLAT_FVP_CCI5XX_BASE UL(0x2a000000)
319 #define PLAT_ARM_CCN_BASE UL(0x2e000000)
344 #define PLAT_ARM_TZC_BASE UL(0x2a4a0000)
404 #define PLAT_ARM_EVENT_LOG_MAX_SIZE UL(0x400)
409 #define PLAT_DRTM_EVENT_LOG_MAX_SIZE UL(0x300)