Lines Matching refs:UL
29 #define FLASH1_BASE UL(0x8c000000)
30 #define FLASH1_SIZE UL(0x04000000)
32 #define PSRAM_BASE UL(0x94000000)
33 #define PSRAM_SIZE UL(0x04000000)
35 #define VRAM_BASE UL(0x98000000)
36 #define VRAM_SIZE UL(0x02000000)
39 #define DEVICE0_BASE UL(0xa0000000)
40 #define DEVICE0_SIZE UL(0x0c200000)
46 #define DEVICE1_BASE UL(0xae000000)
47 #define DEVICE1_SIZE UL(0x1A00000)
49 #define NSRAM_BASE UL(0xae000000)
50 #define NSRAM_SIZE UL(0x10000)
52 #define DEVICE2_BASE UL(0xffe00000)
53 #define DEVICE2_SIZE UL(0x00200000)
55 #define PCIE_EXP_BASE UL(0xc0000000)
56 #define TZRNG_BASE UL(0x7fe60000)
59 #define TRUSTED_NVCTR_BASE UL(0xffe70000)
60 #define TFW_NVCTR_BASE (TRUSTED_NVCTR_BASE + UL(0x0000))
61 #define TFW_NVCTR_SIZE UL(4)
62 #define NTFW_CTR_BASE (TRUSTED_NVCTR_BASE + UL(0x0004))
63 #define NTFW_CTR_SIZE UL(4)
66 #define SOC_KEYS_BASE UL(0xffe80000)
67 #define TZ_PUB_KEY_HASH_BASE (SOC_KEYS_BASE + UL(0x0000))
68 #define TZ_PUB_KEY_HASH_SIZE UL(32)
69 #define HU_KEY_BASE (SOC_KEYS_BASE + UL(0x0020))
70 #define HU_KEY_SIZE UL(16)
71 #define END_KEY_BASE (SOC_KEYS_BASE + UL(0x0044))
72 #define END_KEY_SIZE UL(32)
91 #define PWRC_BASE UL(0x1c100000)