Lines Matching refs:UL
34 #define TC_TZC_DRAM1_SIZE UL(0x02000000) /* 32 MB */
72 #define PLAT_ARM_SPMC_SIZE UL(0x200000) /* 2 MB */
220 #define SBSA_SECURE_WDOG_BASE UL(0x2A480000)
221 #define SBSA_SECURE_WDOG_TIMEOUT UL(100)
230 #define PLAT_CSS_MHU_BASE UL(0x45400000)
234 #define PLAT_RSS_AP_SND_MHU_BASE UL(0x2A840000)
235 #define PLAT_RSS_AP_RCV_MHU_BASE UL(0x2A850000)
247 #define PLAT_ARM_GICD_BASE UL(0x30000000)
248 #define PLAT_ARM_GICC_BASE UL(0x2C000000)
249 #define PLAT_ARM_GICR_BASE UL(0x30080000)
264 #define PLAT_ARM_TZC_BASE UL(0x25000000)
267 #define TZC400_OFFSET UL(0x1000000)
292 #define PLAT_ARM_MEM_PROTEC_VA_FRAME UL(0xc0000000)