Lines Matching refs:sdio0_cfg
34 const SDIO_CFG *sdio0_cfg, *sdio1_cfg; in brcm_stingray_sdio_init() local
36 sdio0_cfg = &sr_sdio0_cfg; in brcm_stingray_sdio_init()
43 mmio_write_32(sdio0_cfg->cfg_base + ICFG_SDIO_CAP0, val); in brcm_stingray_sdio_init()
48 mmio_write_32(sdio0_cfg->cfg_base + ICFG_SDIO_CAP1, val); in brcm_stingray_sdio_init()
50 mmio_write_32(sdio0_cfg->cfg_base + ICFG_SDIO_STRAPSTATUS_0, in brcm_stingray_sdio_init()
52 mmio_write_32(sdio0_cfg->cfg_base + ICFG_SDIO_STRAPSTATUS_1, in brcm_stingray_sdio_init()
54 mmio_write_32(sdio0_cfg->cfg_base + ICFG_SDIO_STRAPSTATUS_2, in brcm_stingray_sdio_init()
56 mmio_write_32(sdio0_cfg->cfg_base + ICFG_SDIO_STRAPSTATUS_3, in brcm_stingray_sdio_init()
58 mmio_write_32(sdio0_cfg->cfg_base + ICFG_SDIO_STRAPSTATUS_4, in brcm_stingray_sdio_init()
62 mmio_write_32(sdio0_cfg->sid_base + ICFG_SDIO_SID_ARADDR, val); in brcm_stingray_sdio_init()
63 mmio_write_32(sdio0_cfg->sid_base + ICFG_SDIO_SID_AWADDR, val); in brcm_stingray_sdio_init()
65 val = mmio_read_32(sdio0_cfg->io_ctrl_base); in brcm_stingray_sdio_init()
68 mmio_write_32(sdio0_cfg->io_ctrl_base, val); in brcm_stingray_sdio_init()
70 mmio_clrsetbits_32(sdio0_cfg->pad_base + PAD_SDIO_CLK, in brcm_stingray_sdio_init()
72 mmio_clrsetbits_32(sdio0_cfg->pad_base + PAD_SDIO_DATA0, in brcm_stingray_sdio_init()
74 mmio_clrsetbits_32(sdio0_cfg->pad_base + PAD_SDIO_DATA1, in brcm_stingray_sdio_init()
76 mmio_clrsetbits_32(sdio0_cfg->pad_base + PAD_SDIO_DATA2, in brcm_stingray_sdio_init()
78 mmio_clrsetbits_32(sdio0_cfg->pad_base + PAD_SDIO_DATA3, in brcm_stingray_sdio_init()
80 mmio_clrsetbits_32(sdio0_cfg->pad_base + PAD_SDIO_DATA4, in brcm_stingray_sdio_init()
82 mmio_clrsetbits_32(sdio0_cfg->pad_base + PAD_SDIO_DATA5, in brcm_stingray_sdio_init()
84 mmio_clrsetbits_32(sdio0_cfg->pad_base + PAD_SDIO_DATA6, in brcm_stingray_sdio_init()
86 mmio_clrsetbits_32(sdio0_cfg->pad_base + PAD_SDIO_DATA7, in brcm_stingray_sdio_init()
88 mmio_clrsetbits_32(sdio0_cfg->pad_base + PAD_SDIO_CMD, in brcm_stingray_sdio_init()