Lines Matching refs:cpu_id
90 #define PWRC_CPUN_CR_REG(cpu_id) \ argument
91 (MVEBU_REGS_BASE + 0x680000 + (cpu_id * 0x10))
100 #define CCU_B_PRCRN_REG(cpu_id) \ argument
102 ((cpu_id / 2) * (0x400)) + ((cpu_id % 2) * 4))
119 static int plat_marvell_cpu_powerdown(int cpu_id) in plat_marvell_cpu_powerdown() argument
124 INFO("Powering down CPU%d\n", cpu_id); in plat_marvell_cpu_powerdown()
127 reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id)); in plat_marvell_cpu_powerdown()
129 mmio_write_32(PWRC_CPUN_CR_REG(cpu_id), reg_val); in plat_marvell_cpu_powerdown()
133 reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id)); in plat_marvell_cpu_powerdown()
139 reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id)); in plat_marvell_cpu_powerdown()
141 mmio_write_32(PWRC_CPUN_CR_REG(cpu_id), reg_val); in plat_marvell_cpu_powerdown()
146 reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id)); in plat_marvell_cpu_powerdown()
154 reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id)); in plat_marvell_cpu_powerdown()
156 mmio_write_32(PWRC_CPUN_CR_REG(cpu_id), reg_val); in plat_marvell_cpu_powerdown()
159 reg_val = mmio_read_32(CCU_B_PRCRN_REG(cpu_id)); in plat_marvell_cpu_powerdown()
161 mmio_write_32(CCU_B_PRCRN_REG(cpu_id), reg_val); in plat_marvell_cpu_powerdown()
166 reg_val = mmio_read_32(CCU_B_PRCRN_REG(cpu_id)); in plat_marvell_cpu_powerdown()
173 INFO("Successfully powered down CPU%d\n", cpu_id); in plat_marvell_cpu_powerdown()
178 ERROR("ERROR: Can't power down CPU%d\n", cpu_id); in plat_marvell_cpu_powerdown()
230 int cpu_id = MPIDR_CPU_GET(mpidr), in plat_marvell_cpu_powerup() local
235 cpu_id = cluster * PLAT_MARVELL_CLUSTER_CORE_COUNT + cpu_id; in plat_marvell_cpu_powerup()
237 INFO("Powering on CPU%d\n", cpu_id); in plat_marvell_cpu_powerup()
249 reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id)); in plat_marvell_cpu_powerup()
251 mmio_write_32(PWRC_CPUN_CR_REG(cpu_id), reg_val); in plat_marvell_cpu_powerup()
257 reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id)); in plat_marvell_cpu_powerup()
259 mmio_write_32(PWRC_CPUN_CR_REG(cpu_id), reg_val); in plat_marvell_cpu_powerup()
265 reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id)); in plat_marvell_cpu_powerup()
274 reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id)); in plat_marvell_cpu_powerup()
276 mmio_write_32(PWRC_CPUN_CR_REG(cpu_id), reg_val); in plat_marvell_cpu_powerup()
281 reg_val = mmio_read_32(PWRC_CPUN_CR_REG(cpu_id)); in plat_marvell_cpu_powerup()
287 reg_val = mmio_read_32(CCU_B_PRCRN_REG(cpu_id)); in plat_marvell_cpu_powerup()
289 mmio_write_32(CCU_B_PRCRN_REG(cpu_id), reg_val); in plat_marvell_cpu_powerup()
294 reg_val = mmio_read_32(CCU_B_PRCRN_REG(cpu_id)); in plat_marvell_cpu_powerup()
302 INFO("Successfully powered on CPU%d\n", cpu_id); in plat_marvell_cpu_powerup()
307 ERROR("ERROR: Can't power up CPU%d\n", cpu_id); in plat_marvell_cpu_powerup()
313 int cpu_id; in plat_marvell_cpu_on() local
320 cpu_id = MPIDR_CPU_GET(mpidr); in plat_marvell_cpu_on()
329 mmio_write_32(MVEBU_CCU_RVBAR(cpu_id), in plat_marvell_cpu_on()
333 mmio_write_32(MVEBU_CCU_CPU_UN_RESET(cpu_id), 0x10001); in plat_marvell_cpu_on()