Lines Matching refs:r0
25 ldcopr r0, MPIDR
34 and r1, r0, #MPIDR_CPU_MASK
35 and r0, r0, #MPIDR_CLUSTER_MASK
36 add r0, r1, r0, LSR #6
48 ldcopr r0, MPIDR
50 and r0, r1
51 cmp r0, #QEMU_PRIMARY_CPU
52 moveq r0, #1
53 movne r0, #0
69 lsl r0, r0, #PLAT_QEMU_HOLD_ENTRY_SHIFT
74 ldr r1, [r2, r0]
80 str r1, [r2, r0]
83 mov_imm r0, PLAT_QEMU_TRUSTED_MAILBOX_BASE
84 ldr r1, [r0]
93 mov r0, #0
109 mov_imm r0, PLAT_QEMU_CRASH_UART_BASE
136 mov_imm r0, PLAT_QEMU_CRASH_UART_BASE