Lines Matching refs:mmio_write_32
39 mmio_write_32(FIREWALL_DDR_BASE + in secure_ddr_region()
46 mmio_write_32(FIREWALL_DDR_BASE + in secure_ddr_region()
52 mmio_write_32(STIMER_CHN_BASE(1) + TIMER_CONTROL_REG, in secure_timer_init()
55 mmio_write_32(STIMER_CHN_BASE(1) + TIMER_LOAD_COUNT0, 0xffffffff); in secure_timer_init()
56 mmio_write_32(STIMER_CHN_BASE(1) + TIMER_LOAD_COUNT1, 0xffffffff); in secure_timer_init()
59 mmio_write_32(STIMER_CHN_BASE(1) + TIMER_CONTROL_REG, in secure_timer_init()
84 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(4), SGRF_SLV_S_ALL_NS); in sgrf_init()
85 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(5), SGRF_SLV_S_ALL_NS); in sgrf_init()
86 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(6), SGRF_SLV_S_ALL_NS); in sgrf_init()
87 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(7), SGRF_SLV_S_ALL_NS); in sgrf_init()
88 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(8), 0x00030000); in sgrf_init()
91 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(3), 0x000f0003); in sgrf_init()
94 mmio_write_32(SGRF_BASE + SGRF_DMAC_CON(0), DMA_IRQ_BOOT_NS); in sgrf_init()
95 mmio_write_32(SGRF_BASE + SGRF_DMAC_CON(1), DMA_PERI_CH_NS_15_0); in sgrf_init()
96 mmio_write_32(SGRF_BASE + SGRF_DMAC_CON(2), DMA_PERI_CH_NS_19_16); in sgrf_init()
97 mmio_write_32(SGRF_BASE + SGRF_DMAC_CON(3), DMA_MANAGER_BOOT_NS); in sgrf_init()
100 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1), DMA_SOFTRST_REQ); in sgrf_init()
102 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1), DMA_SOFTRST_RLS); in sgrf_init()