Lines Matching refs:CRU_BASE
47 MAP_REGION_FLAT(CRU_BASE, CRU_SIZE,
109 pll[0] = mmio_read_32(CRU_BASE + PLL_CONS((pll_id), 0)); in pll_save()
110 pll[1] = mmio_read_32(CRU_BASE + PLL_CONS((pll_id), 1)); in pll_save()
111 pll[2] = mmio_read_32(CRU_BASE + PLL_CONS((pll_id), 2)); in pll_save()
112 pll[3] = mmio_read_32(CRU_BASE + PLL_CONS((pll_id), 3)); in pll_save()
121 slp_data.pll_mode = mmio_read_32(CRU_BASE + PLL_MODE_CON); in clk_plls_suspend()
133 mmio_write_32(CRU_BASE + PLL_MODE_CON, 0xf3030000); in clk_plls_suspend()
139 mmio_write_32(CRU_BASE + PLL_MODE_CON, in clk_plls_resume()
149 mmio_read_32(CRU_BASE + CRU_CLKGATES_CON(i)); in clk_gate_con_save()
157 mmio_write_32(CRU_BASE + CRU_CLKGATES_CON(i), REG_SOC_WMSK); in clk_gate_con_disable()
165 mmio_write_32(CRU_BASE + CRU_CLKGATES_CON(i), in clk_gate_con_restore()
175 mmio_read_32(CRU_BASE + CRU_CLKSELS_CON(i)); in clk_sel_con_save()
191 mmio_write_32(CRU_BASE + CRU_CLKSELS_CON(i), val); in clk_sel_con_restore()
209 mmio_write_32(CRU_BASE + PLL_MODE_CON, 0xf3030000); in rockchip_soc_soft_reset()
211 temp_val = mmio_read_32(CRU_BASE + CRU_GLB_RST_CON); in rockchip_soc_soft_reset()
214 mmio_write_32(CRU_BASE + CRU_GLB_RST_CON, temp_val); in rockchip_soc_soft_reset()
215 mmio_write_32(CRU_BASE + CRU_GLB_SRST_SND, 0xeca8); in rockchip_soc_soft_reset()