Lines Matching refs:channel
125 static __pmusramfunc void rkclk_ddr_reset(uint32_t channel, uint32_t ctl, in rkclk_ddr_reset() argument
128 channel &= 0x1; in rkclk_ddr_reset()
132 CRU_SFTRST_DDR_CTRL(channel, ctl) | in rkclk_ddr_reset()
133 CRU_SFTRST_DDR_PHY(channel, phy)); in rkclk_ddr_reset()
431 unsigned char channel, uint32_t ddrconfig) in set_ddrconfig() argument
434 struct rk3399_sdram_channel *ch = &sdram_params->ch[channel]; in set_ddrconfig()
446 mmio_write_32(MSCH_BASE(channel) + MSCH_DEVICECONF, in set_ddrconfig()
448 mmio_write_32(MSCH_BASE(channel) + MSCH_DEVICESIZE, in set_ddrconfig()
787 uint32_t channel; in dmc_resume() local
811 for (channel = 0; channel < sdram_params->num_channels; channel++) { in dmc_resume()
812 phy_pctrl_reset(channel); in dmc_resume()
818 phy_dll_bypass_set(channel, sdram_params->ddr_freq); in dmc_resume()
820 pctl_cfg(channel, sdram_params); in dmc_resume()
823 for (channel = 0; channel < 2; channel++) { in dmc_resume()
824 if (sdram_params->ch[channel].col) in dmc_resume()
825 channel_mask |= 1 << channel; in dmc_resume()
831 for (channel = 0; channel < sdram_params->num_channels; channel++) { in dmc_resume()
841 data_training(channel, sdram_params, PI_FULL_TRAINING)) in dmc_resume()
844 set_ddrconfig(sdram_params, channel, in dmc_resume()
845 sdram_params->ch[channel].ddrconfig); in dmc_resume()