Lines Matching refs:CRU_BASE
58 mmio_write_32((CRU_BASE + in set_pll_slow_mode()
67 mmio_write_32(CRU_BASE + in set_pll_normal_mode()
77 mmio_write_32(CRU_BASE + in set_pll_bypass()
126 mmio_write_32((CRU_BASE + CRU_PLL_CON(pll_id, 3)), PLL_SLOW_MODE); in restore_pll()
128 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 0), src[0] | REG_SOC_WMSK); in restore_pll()
129 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 1), src[1] | REG_SOC_WMSK); in restore_pll()
130 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 2), src[2]); in restore_pll()
131 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 4), src[4] | REG_SOC_WMSK); in restore_pll()
132 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 5), src[5] | REG_SOC_WMSK); in restore_pll()
135 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 3), src[3] | REG_SOC_WMSK); in restore_pll()
138 while ((mmio_read_32(CRU_BASE + CRU_PLL_CON(pll_id, 2)) & in restore_pll()
159 dst[i] = mmio_read_32(CRU_BASE + CRU_PLL_CON(pll_id, i)); in save_pll()
191 mmio_read_32(CRU_BASE + CRU_GATE_CON(i)); in clk_gate_con_save()
202 mmio_write_32(CRU_BASE + CRU_GATE_CON(i), REG_SOC_WMSK); in clk_gate_con_disable()
214 mmio_write_32(CRU_BASE + CRU_GATE_CON(i), in clk_gate_con_restore()
224 mmio_write_32(CRU_BASE + CRU_PLL_CON(pll_id, 3), in set_plls_nobypass()
325 mmio_clrbits_32(CRU_BASE + CRU_GLB_RST_CON, in soc_global_soft_reset_init()
342 mmio_write_32(CRU_BASE + CRU_GLB_SRST_FST, GLB_SRST_FST_CFG_VAL); in soc_global_soft_reset()