Lines Matching refs:shres_id
378 enum stm32mp_shres shres_id = STM32MP1_SHRES_COUNT; in stm32mp_nsec_can_access_clock() local
402 shres_id = STM32MP1_SHRES_CRYP1; in stm32mp_nsec_can_access_clock()
405 shres_id = STM32MP1_SHRES_HASH1; in stm32mp_nsec_can_access_clock()
408 shres_id = STM32MP1_SHRES_I2C4; in stm32mp_nsec_can_access_clock()
411 shres_id = STM32MP1_SHRES_I2C6; in stm32mp_nsec_can_access_clock()
414 shres_id = STM32MP1_SHRES_IWDG1; in stm32mp_nsec_can_access_clock()
417 shres_id = STM32MP1_SHRES_RNG1; in stm32mp_nsec_can_access_clock()
420 shres_id = STM32MP1_SHRES_RTC; in stm32mp_nsec_can_access_clock()
423 shres_id = STM32MP1_SHRES_SPI6; in stm32mp_nsec_can_access_clock()
426 shres_id = STM32MP1_SHRES_USART1; in stm32mp_nsec_can_access_clock()
432 return periph_is_non_secure(shres_id); in stm32mp_nsec_can_access_clock()
437 enum stm32mp_shres shres_id = STM32MP1_SHRES_COUNT; in stm32mp_nsec_can_access_reset() local
441 shres_id = STM32MP1_SHRES_CRYP1; in stm32mp_nsec_can_access_reset()
447 shres_id = STM32MP1_SHRES_HASH1; in stm32mp_nsec_can_access_reset()
450 shres_id = STM32MP1_SHRES_I2C4; in stm32mp_nsec_can_access_reset()
453 shres_id = STM32MP1_SHRES_I2C6; in stm32mp_nsec_can_access_reset()
456 shres_id = STM32MP1_SHRES_MCU; in stm32mp_nsec_can_access_reset()
459 shres_id = STM32MP1_SHRES_MDMA; in stm32mp_nsec_can_access_reset()
462 shres_id = STM32MP1_SHRES_RNG1; in stm32mp_nsec_can_access_reset()
465 shres_id = STM32MP1_SHRES_SPI6; in stm32mp_nsec_can_access_reset()
468 shres_id = STM32MP1_SHRES_USART1; in stm32mp_nsec_can_access_reset()
474 return periph_is_non_secure(shres_id); in stm32mp_nsec_can_access_reset()