Lines Matching refs:DSI
7 title: Renesas RZ/G2L MIPI DSI Encoder
13 This binding describes the MIPI DSI encoder embedded in the Renesas
14 RZ/G2L alike family of SoC's. The encoder can operate in DSI mode, with
36 - description: DSI Packet Receive interrupt
37 - description: DSI Fatal Error interrupt
38 - description: DSI D-PHY PPI interrupt
53 - description: DSI D-PHY PLL multiplied clock
54 - description: DSI D-PHY system clock
55 - description: DSI AXI bus clock
56 - description: DSI Register access clock
57 - description: DSI Video clock
58 - description: DSI D-PHY Escape mode transmit clock
95 description: DSI output port
104 description: array of physical DSI data lane indexes.