Lines Matching refs:ldr
43 ldr ip, CACHE_FLUSH
53 ldr ip, [r0, #DDR2_SDRCR_OFFSET]
58 ldr ip, [r0, #DDR2_SDRCR_OFFSET]
73 ldr ip, [r3, #PLLDIV1]
78 ldr ip, [r3, #PLLCTL]
89 ldr ip, [r3, #PLLCTL]
94 ldr ip, [r4]
102 ldr ip, [r4]
109 ldr ip, [r3, #PLLCTL]
114 ldr ip, [r3, #PLLCTL]
123 ldr ip, [r3, #PLLCTL]
133 ldr ip, [r3, #PLLCTL]
140 ldr ip, [r3, #PLLDIV1]
154 ldr ip, [r0, #DDR2_SDRCR_OFFSET]
158 ldr ip, [r0, #DDR2_SDRCR_OFFSET]
178 ldr ip, [r1, r6]
184 ldr ip, [r1, #PTCMD]
190 ldr ip, [r1, #PTSTAT]
199 ldr ip, [r1, r6]