Lines Matching refs:infracfg
152 infracfg: infracfg@10001000 { label
153 compatible = "mediatek,mt7986-infracfg", "syscon";
223 clocks = <&infracfg CLK_INFRA_TRNG_CK>;
236 clocks = <&infracfg CLK_INFRA_EIP97_CK>;
248 clocks = <&infracfg CLK_INFRA_UART0_SEL>,
249 <&infracfg CLK_INFRA_UART0_CK>;
252 <&infracfg CLK_INFRA_UART0_SEL>;
263 clocks = <&infracfg CLK_INFRA_UART1_SEL>,
264 <&infracfg CLK_INFRA_UART1_CK>;
266 assigned-clocks = <&infracfg CLK_INFRA_UART1_SEL>;
276 clocks = <&infracfg CLK_INFRA_UART2_SEL>,
277 <&infracfg CLK_INFRA_UART2_CK>;
279 assigned-clocks = <&infracfg CLK_INFRA_UART2_SEL>;
290 clocks = <&infracfg CLK_INFRA_I2C0_CK>,
291 <&infracfg CLK_INFRA_AP_DMA_CK>;
306 <&infracfg CLK_INFRA_SPI0_CK>,
307 <&infracfg CLK_INFRA_SPI0_HCK_CK>;
320 <&infracfg CLK_INFRA_SPI1_CK>,
321 <&infracfg CLK_INFRA_SPI1_HCK_CK>;
333 clocks = <&infracfg CLK_INFRA_IUSB_SYS_CK>,
334 <&infracfg CLK_INFRA_IUSB_CK>,
335 <&infracfg CLK_INFRA_IUSB_133_CK>,
336 <&infracfg CLK_INFRA_IUSB_66M_CK>,
355 <&infracfg CLK_INFRA_MSDC_HCK_CK>,
356 <&infracfg CLK_INFRA_MSDC_CK>,
357 <&infracfg CLK_INFRA_MSDC_133M_CK>,
358 <&infracfg CLK_INFRA_MSDC_66M_CK>;
376 clocks = <&infracfg CLK_INFRA_IPCIE_PIPE_CK>,
377 <&infracfg CLK_INFRA_IPCIE_CK>,
378 <&infracfg CLK_INFRA_IPCIER_CK>,
379 <&infracfg CLK_INFRA_IPCIEB_CK>;